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    Method for displaying an interactive game having a pre-determined outcome
    2.
    发明申请
    Method for displaying an interactive game having a pre-determined outcome 有权

    公开(公告)号：US20040237118A1

    公开(公告)日：2004-11-25

    申请号：US10864784

    申请日：2004-06-08

    发明人： Norman H. Millerschone

    IPC分类号： H04N007/173 ,  A63F013/00 ,  G06F019/00 ,  G06F017/00 ,  H04N007/16 ,  H01L021/82 ,  G09B019/22 ,  A63F009/24

    CPC分类号： G07F17/32 ,  A63F13/10

    摘要： An interactive game having a pre-determined outcome (e.g., a game of finite poker) that displays an initial hand of cards, receives a player-specified designation as to which cards are to held and which are to be discarded, and then displays an intermediate hand generated in accordance with the player-specified designation. Then a final hand is shown, and in those cases where the player-specified designation (Hold/Discard) is inconsistent with a transition from the intermediate hand to the final hand, an entertaining display is shown, such as a sequence of alternative playing cards. In some cases, the initial hand is a winning hand according to a predetermined payout schedule, and the final hand is a winning hand with a higher payout than the initial hand according to the same payout schedule. The disclosed methods can be used with other games, including reel-type games.

    METAL PROGRAMMABLE INTEGRATED CIRCUIT CAPABLE OF UTILIZING A PLURALITY OF CLOCK SOURCES AND CAPABLE OF ELIMINATING CLOCK SKEW
    3.
    发明申请
    METAL PROGRAMMABLE INTEGRATED CIRCUIT CAPABLE OF UTILIZING A PLURALITY OF CLOCK SOURCES AND CAPABLE OF ELIMINATING CLOCK SKEW 有权
    金属可编程集成电路，可以利用多个时钟源，并能够消除时钟轴

    公开(公告)号：US20040224443A1

    公开(公告)日：2004-11-11

    申请号：US10249745

    申请日：2003-05-05

    发明人： Hsin-Shih Wang ,  Shang-Jyh Shieh

    IPC分类号： H01L021/82

    CPC分类号： G06F1/10 ,  H01L27/11803

    摘要： A method for forming a metal programmable integrated circuit that can use a plurality of clock sources and balance clock skew. The integrated circuit has a semiconductor body. The method includes step (a) used for forming a plurality of basic units on the semiconductor body wherein each basic unit has at least a logic module, at least a driving module, and at least a storage module, and step (b) used for forming a metal layer for programming the logic module to be able to perform logic operations, programming the driving module to able to drive an input signal inputted into the driving module, and programming the storage module to be able to store data after performing step (a).

    摘要翻译： 一种用于形成可以使用多个时钟源并平衡时钟偏移的金属可编程集成电路的方法。 该集成电路具有半导体本体。 该方法包括用于在半导体本体上形成多个基本单元的步骤（a），其中每个基本单元至少具有一个逻辑模块，至少一个驱动模块和至少一个存储模块，以及步骤（b） 形成用于对所述逻辑模块进行编程以便能够执行逻辑操作的金属层，对所述驱动模块进行编程以能够驱动输入到所述驱动模块的输入信号，以及对所述存储模块进行编程，以便能够在执行步骤（a ）。

    Fuse and method for forming
    5.
    发明申请
    Fuse and method for forming 失效
    保险丝和成型方法

    公开(公告)号：US20040217439A1

    公开(公告)日：2004-11-04

    申请号：US10425275

    申请日：2003-04-29

    发明人： Chi Nan Brian Li ,  Alexander B. Hoefler ,  Der-Gao Lin

    IPC分类号： H01L021/82 ,  H01L029/00 ,  H01L021/44

    CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An active fuse includes an active fuse geometry (120) that is used to form both a variable resistor (106) and a select transistor (110). In one embodiment, the active fuse geometry is formed in a portion of an active region (160) of a semiconductor substrate (140), and a select gate (124) is disposed over an end portion (123) of the active fuse geometry to form an integral select transistor (110) for use in programming the active fuse. The use of a shared active fuse geometry within the active region allows for reduced area requirements and improved sensing margins.

    摘要翻译： 有源保险丝包括用于形成可变电阻器（106）和选择晶体管（110）的有源熔丝几何形状（120）。 在一个实施例中，有源熔丝几何形状形成在半导体衬底（140）的有源区（160）的一部分中，并且选择栅极（124）设置在有源熔丝几何体的端部（123）上方， 形成用于编程有源保险丝的整体选择晶体管（110）。 在有源区域内使用共享的有源保险丝几何形状允许减少面积要求和改进的感测裕度。

    Semiconductor integrated circuit including anti-fuse and method for manufacturing the same
    7.
    发明申请
    Semiconductor integrated circuit including anti-fuse and method for manufacturing the same 有权
    包括反熔丝的半导体集成电路及其制造方法

    公开(公告)号：US20040159907A1

    公开(公告)日：2004-08-19

    申请号：US10773213

    申请日：2004-02-09

    申请人： KAWASAKI MICROELECTRONICS, INC.

    发明人： Isamu Kuno ,  Tomoharu Katagiri

    IPC分类号： H01L021/82 ,  H01L029/00

    CPC分类号： H01L21/76202 ,  G11C17/18 ,  H01L23/5252 ,  H01L27/0617 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An anti-fuse is manufactured by forming an isolation region including an insulating material layer buried in a surface of a device formation region on a surface of a semiconductor substrate, and by forming diffusion regions at both sides of the isolation region, then by contacting electrodes to the respective diffusion regions. The anti-fuse is initially in a non-conductive state, and is programmed to be in a permanently conductive state by a simple writing circuit.

    摘要翻译： 通过在半导体衬底的表面上形成包括掩埋在器件形成区域的表面中的绝缘材料层的隔离区域，并且通过在隔离区域的两侧形成扩散区域来制造反熔丝， 到各个扩散区域。 反熔丝最初处于非导通状态，并通过简单的写入电路被编程为处于永久导通状态。

    Methods to form a memory cell with metal-rich metal chalcogenide
    8.
    发明申请
    Methods to form a memory cell with metal-rich metal chalcogenide 失效
    用金属富金属硫族化物形成记忆电池的方法

    公开(公告)号：US20040157417A1

    公开(公告)日：2004-08-12

    申请号：US10769787

    申请日：2004-02-03

    发明人： John T. Moore ,  Terry L. Gilton ,  Kristy A. Campbell

    IPC分类号： H01L021/04 ,  H01L021/8234 ,  H01L021/82 ,  H01L021/8244

    CPC分类号： H01L45/1675 ,  H01L27/2463 ,  H01L45/085 ,  H01L45/143 ,  H01L45/1641

    摘要： The invention relates to the fabrication of a resistance variable material cell or programmable metallization cell. The processes described herein can form a metal-rich metal chalcogenide, such as, for example, silver-rich silver selenide. Advantageously, the processes can form the metal-rich metal chalcogenide without the use of photodoping techniques and without direct deposition of the metal. For example, the process can remove selenium from silver selenide. One embodiment of the process implants oxygen to silver selenide to form selenium oxide. The selenium oxide is then removed by annealing, which results in silver-rich silver selenide. Advantageously, the processes can dope silver into a variety of materials, including non-transparent materials, with relatively high uniformity and with relatively precise control.

    摘要翻译： 本发明涉及电阻可变材料单元或可编程金属化单元的制造。 本文所述的方法可形成金属富金属硫族化物，例如富银硒化银。 有利的是，该方法可以形成富含金属的金属硫属元素化物，而不需要使用光致激发技术，而不会直接沉积金属。 例如，该过程可以从硒化银中除去硒。 该方法的一个实施方案是将氧沉积到硒化银以形成氧化硒。 然后通过退火除去氧化硒，这导致富银银硒化银。 有利的是，该方法可以将银掺杂到各种材料中，包括非透明材料，具有相对高的均匀性和相对精确的控制。

    Self-passivating Cu laser fuse
    9.
    发明申请
    Self-passivating Cu laser fuse 失效
    自钝化铜激光保险丝

    公开(公告)号：US20040135230A1

    公开(公告)日：2004-07-15

    申请号：US10745263

    申请日：2003-12-23

    发明人： Hans-Joachim Barth

    IPC分类号： H01L021/82 ,  H01L029/00

    CPC分类号： H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In an integrated circuit structure, the improvement comprising a self-passivating Cu-laser fuse characterized by resistance to oxidation and corrosion and improved adhesion in the interface between Cu and metallization lines and Cu and a dielectric cap subsequent to blowing the fuse by an energizing laser, the fuse comprising: a metallization-line; a liner separating the metallization line and a combination Cu-alloy seed layer and a pure Cu layer; a dielectric surrounding the liner; and a dielectric cap disposed over the surrounding dielectric, the liner and the combination Cu-alloy seed layer and pure Cu layer; the laser fuse being characterized after laser energizing by passivation areas: a) on the open Cu-fuse surface; and b) in the interfaces between: (i) the Cu-alloy seed layer and the liners and dielectric; and (ii) between the pure Cu layer and the dielectric cap.

    摘要翻译： 在集成电路结构中，改进包括自钝化铜激光熔丝，其特征在于抗氧化和腐蚀，并且在Cu和金属化线之间的界面中改善粘合性，并且通过激励激光器熔化熔丝后的Cu和介电帽 所述保险丝包括：金属化线; 分离金属化线和组合的Cu合金种子层和纯Cu层的衬里; 围绕衬套的电介质; 以及设置在周围电介质，衬垫和组合Cu合金晶种层和纯Cu层上的电介质盖; 激光熔丝的特征在于钝化区域激光激励后：a）在开放的Cu熔丝表面上; 和b）在以下界面中：（i）Cu合金种子层和衬垫和电介质; 和（ii）在纯Cu层和电介质盖之间。