Operating system abstraction and protection layer
    2.
    发明申请
    Operating system abstraction and protection layer 有权
    操作系统抽象和保护层

    公开(公告)号:US20040268361A1

    公开(公告)日:2004-12-30

    申请号:US10894668

    申请日:2004-07-20

    Inventor: Stuart Schaefer

    CPC classification number: G06F9/54

    Abstract: The present invention provides a system for creating an application software environment without changing an operating system of a client computer, the system comprising an operating system abstraction and protection layer, wherein said abstraction and protection layer is interposed between a running software application and said operating system, whereby a virtual environment in which an application may run is provided and application level interactions are substantially removed. Preferably, any changes directly to the operating system are selectively made within the context of the running application and the abstraction and protection layer dynamically changes the virtual environment according to administrative settings. Additionally, in certain embodiments, the system continually monitors the use of shared system resources and acts as a service to apply and remove changes to system components. The present thus invention defines an nullOperating System Guard.null These components cover the protection semantics required by DLLs and other shared library code as well as system device drivers, fonts, registries and other configuration items, files, and environment variables.

    Abstract translation: 本发明提供一种用于创建应用软件环境而不改变客户端计算机的操作系统的系统,该系统包括操作系统抽象和保护层,其中所述抽象和保护层置于正在运行的软件应用程序和所述操作系统之间 ,由此提供应用可以运行的虚拟环境,并且基本上移除应用级交互。 优选地,在运行的应用程序的上下文中选择性地进行对操作系统的任何改变,并且抽象和保护层根据管理设置动态地改变虚拟环境。 另外,在某些实施例中,系统持续地监视共享系统资源的使用,并且作为服务来应用和移除对系统组件的改变。 本发明定义了“操作系统防护”。 这些组件涵盖了DLL和其他共享库代码以及系统设备驱动程序,字体,注册表和其他配置项,文件和环境变量所需的保护语义。

    Method and apparatus for processing program threads
    3.
    发明申请
    Method and apparatus for processing program threads 有权
    处理程序线程的方法和装置

    公开(公告)号:US20040268350A1

    公开(公告)日:2004-12-30

    申请号:US10610314

    申请日:2003-06-30

    CPC classification number: G06F9/4881 G06F9/3836

    Abstract: A procedure identifies a program image and generates a basic block flow graph associated with the program image. Execution of the program image is benchmarked and the basic block flow graph is annotated with the results of the benchmarking of the program image. Basic blocks of the program are then grouped into bins. When the program image is executed, a drafting scheduler stops threads before they leave a bin and schedules any threads queued for the same bin.

    Abstract translation: 程序识别节目图像并生成与节目图像相关联的基本块流程图。 对程序图像的执行进行基准测试,基本块流程图用程序映像的基准测试结果进行注释。 然后将程序的基本块分组成箱。 当执行程序映像时,一个起草调度程序在他们离开一个bin之前停止线程,并调度排队等同于一个bin的任何线程。

    Apparatus and method for managing a processor pipeline in response to exceptions
    4.
    发明申请
    Apparatus and method for managing a processor pipeline in response to exceptions 有权
    响应于异常来管理处理器流水线的装置和方法

    公开(公告)号:US20040268103A1

    公开(公告)日:2004-12-30

    申请号:US10602931

    申请日:2003-06-24

    CPC classification number: G06F9/3867 G06F9/3861

    Abstract: The present invention is generally directed to an apparatus and method for performing a partial flush of a processor pipeline in response to exceptions (e.g., interrupts). In accordance with an aspect of one embodiment a processor is provided with logic that operates to flush only limited stages of a processor pipepline (e.g., stages between the current instruction and the pending interrupt) if the execution of a current instruction will impact the execution of a pending interrupt (e.g., if the current instruction is a branch, if the current instruction would cause the processor to enter a mode that disables the pending interrupt, etc.). In accordance with another aspect of this embodiment, a method is provided for performing a partial flush of processor pipeline if the execution of a current instruction would impact the execution of a pending interrupt.

    Mechanism to remove stale branch predictions at a microprocessor
    5.
    发明申请
    Mechanism to remove stale branch predictions at a microprocessor 有权
    在微处理器上去除陈旧分支预测的机制

    公开(公告)号:US20040268102A1

    公开(公告)日:2004-12-30

    申请号:US10609814

    申请日:2003-06-30

    CPC classification number: G06F9/3806 G06F9/3844

    Abstract: According to one embodiment a computer system is disclosed. The computer system includes a microprocessor and a chipset coupled to the microprocessor. The microprocessor removes stale branch instructions prior to the execution of a first cache line by finding existing branch prediction data for the first cache line.

    Abstract translation: 根据一个实施例,公开了一种计算机系统。 计算机系统包括微处理器和耦合到微处理器的芯片组。 微处理器通过找到用于第一高速缓存行的现有分支预测数据来在执行第一高速缓存行之前去除陈旧的分支指令。

    Efficient implementation of null reference check
    6.
    发明申请
    Efficient implementation of null reference check 审中-公开
    有效执行空参考检查

    公开(公告)号:US20040268095A1

    公开(公告)日:2004-12-30

    申请号:US10611283

    申请日:2003-06-30

    CPC classification number: G06F9/3842 G06F9/383 G06F9/3861

    Abstract: A method to efficiently implement a null reference check has been disclosed. The method comprises executing a speculative load instruction to load data from an address, checking whether the speculative load instruction execution fails, and raising a null reference exception if the speculative load instruction fails. In one embodiment, the method includes executing a speculative load instruction to load data from an address that includes a base address, checking whether the speculative load instruction execution fails, and checking whether the base address is null if the speculative load instruction execution fails.

    Abstract translation: 已经公开了一种有效地实现空参考检查的方法。 该方法包括执行从地址加载数据的推测加载指令,检查推测加载指令执行是否失败,以及如果推测加载指令失败则引起空引用异常。 在一个实施例中,该方法包括执行从包含基地址的地址加载数据的推测加载指令,检查推测加载指令执行是否失败,以及如果推测加载指令执行失败则检查基地址是否为空。

    Load store unit with replay mechanism
    7.
    发明申请
    Load store unit with replay mechanism 有权
    加载存储单元重放机制

    公开(公告)号:US20040255101A1

    公开(公告)日:2004-12-16

    申请号:US10458457

    申请日:2003-06-10

    Abstract: A microprocessor may include a scheduler configured to issue operations and a load store unit configured to execute memory operations issued by the scheduler. The load store unit is configured to store information identifying memory operations issued to the load store unit. In response to detection of incorrect data speculation for one of the issued memory operations, the load store unit is configured to replay at least one of the issued memory operations by providing an indication to the scheduler. The scheduler is configured to responsively reissue the memory operations identified by the load store unit.

    Abstract translation: 微处理器可以包括被配置为发布操作的调度器和被配置为执行由调度器发出的存储器操作的加载存储单元。 加载存储单元被配置为存储识别发送到加载存储单元的存储器操作的信息。 响应于检测到所发出的存储器操作之一的不正确的数据推测,加载存储单元被配置为通过向调度器提供指示来重播所发布的存储器操作中的至少一个。 调度器被配置为响应地重新发出由加载存储单元识别的存储器操作。

    System and related interfaces supporting the processing of media content
    8.
    发明申请
    System and related interfaces supporting the processing of media content 失效
    支持媒体内容处理的系统和相关界面

    公开(公告)号:US20040250256A1

    公开(公告)日:2004-12-09

    申请号:US10883455

    申请日:2004-07-01

    CPC classification number: H04L29/06027

    Abstract: A software enabled, matrix switch is presented wherein a scalable plurality of inputs, coupled to media content sources, provide media content which is recursively routed through select media processing object(s) coupled to a scalable plurality of matrix switch outputs in accordance with a user-defined media processing project.

    Abstract translation: 提供了一种启用软件的矩阵切换,其中耦合到媒体内容源的可伸缩多个输入提供媒体内容,该媒体内容根据用户被递归地路由选择媒体处理对象,该选择媒体处理对象耦合到可伸缩的多个矩阵切换输出 定义媒体处理项目。

    Dynamic, digitally controlled, temperature compensated voltage reference
    10.
    发明申请
    Dynamic, digitally controlled, temperature compensated voltage reference 有权
    动态,数字控制,温度补偿电压基准

    公开(公告)号:US20040243950A1

    公开(公告)日:2004-12-02

    申请号:US10452697

    申请日:2003-06-02

    CPC classification number: G06F1/26

    Abstract: A voltage reference is dynamically and digitally controlled by a digital function. The digital function may be implemented as a digital calculation or look up table. Inputs to the function include a modifiable trim value stored in a trim register, and a substrate temperature value. The preset value of the trim register is a trim preset value generated by cutting fuses and/or leaving fuses uncut. The cutting may be performed using laser trimming-devices. The output of the digital function is a corrected reference trim value that controls the gain of a voltage reference amplifier whose input is a band gap based voltage reference, and whose output is a derived voltage reference. The substrate temperature value is provided by a monolithic temperature monitor whose sensor may be on the same die as the derived voltage reference. The derived voltage reference provides a stable reference voltage that is dynamically and digitally controllable, to a host system that requires a voltage reference.

    Abstract translation: 电压参考值由数字功能动态和数字控制。 数字功能可以被实现为数字计算或查找表。 功能的输入包括存储在修剪寄存器中的可修改修整值和基板温度值。 修剪寄存器的预设值是通过切断保险丝和/或保留未熔断器产生的修整预设值。 可以使用激光修整装置进行切割。 数字功能的输出是校正的参考调整值,其控制输入是基于带隙的参考电压并且其输出是导出电压基准的参考放大器的增益。 衬底温度值由单片温度监测器提供,其传感器可以在与导出的电压基准相同的管芯上。 导出的电压基准提供动态和数字可控的稳定的参考电压到需要电压参考的主机系统。

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