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    SIGMA DELTA MODULATOR
    4.
    发明申请
    SIGMA DELTA MODULATOR 有权
    SIGMA DELTA调制器

    公开(公告)号：US20090066549A1

    公开(公告)日：2009-03-12

    申请号：US10599343

    申请日：2005-04-11

    Applicant: Henrik Thomsen ,  Claus Erdmann Fuerst

    Inventor： Henrik Thomsen ,  Claus Erdmann Fuerst

    IPC: H03M3/00

    CPC classification number: H03M3/484 ,  H03M3/45 ,  H03M3/454 ,  H03M3/482 ,  H03M3/49 ,  H03M3/492

    Abstract: A method of controlling a sigma delta modulator with a loop which establishes a signal transfer function, STF, and a quantization noise transfer function, NTF, of the sigma delta modulator, wherein the sigma delta modulator receives an input signal, x(n), and provides a modulated output signal, y(n) in response to the input signal. The method is characterized in comprising the step of controlling the sigma delta modulator to change the quantization noise transfer function, NTF, in response to a signal feature, A(n), which is correlated with the input signal.

    Abstract translation: 一种利用建立Σ-Δ调制器的信号传递函数STF和量化噪声传递函数NTF的环路来控制Σ-Δ调制器的方法，其中Σ-Δ调制器接收输入信号x（n） 并且响应于输入信号提供调制输出信号y（n）。 该方法的特征在于包括响应于与输入信号相关的信号特征A（n），控制Σ-Δ调制器改变量化噪声传递函数NTF的步骤。

    Accumulator for adaptive Σ-Δ modulation
    5.
    发明授权
    Accumulator for adaptive Σ-Δ modulation 有权
    用于自适应Σ-Δ调制的累加器

    公开(公告)号：US06885326B2

    公开(公告)日：2005-04-26

    申请号：US10672927

    申请日：2003-09-26

    Applicant: Clemens M. Zierhofer

    Inventor： Clemens M. Zierhofer

    IPC: H03M3/02 ,  H03M3/00

    CPC classification number: H03M3/482

    Abstract: A system and method for adaptive sigma-delta modulation. The system includes a input stage that produces a difference signal representing the difference between an analog input signal x(n) and a analog feedback signal z(n), the amplitude of the analog input signal x(n) within a first range [−a, +a]. An accumulator stage produces a accumulated signal that is a function of an accumulation of the difference signal, the accumulator stage transforming the accumulation of the difference signal so as to increase average magnitude while ensuring instantaneous magnitude does not exceed a predetermined value. A quantization stage produces a quantized digital signal y0(n) representing the accumulated signal. Based on the quantized digital signal y0(n), a adaptation stage produces a digital output signal z0(n), which is converted to the analog feedback signal z(n) by a digital-to-analog converter stage.

    Abstract translation: 一种用于自适应Σ-Δ调制的系统和方法。 该系统包括输入级，其产生表示模拟输入信号x（n）和模拟反馈信号z（n）之间的差的差信号，模拟输入信号x（n）的振幅在第一范围[ a，+ a]。 累加器级产生作为差分信号的累积的函数的累加信号，累加器级转换差分信号的累积，以便在确保瞬时幅度不超过预定值的同时增加平均幅度。 量化级产生表示累积信号的量化数字信号y 0（n）。 基于量化的数字信号y 0（n），适配级产生数字输出信号z 0（n），其被转换为模拟反馈信号z（ n）通过数模转换器级。

    Multi-bit sigma-delta analog to digital converter with a variable full scale
    6.
    发明授权
    Multi-bit sigma-delta analog to digital converter with a variable full scale 有权

    公开(公告)号：US06567025B2

    公开(公告)日：2003-05-20

    申请号：US10071983

    申请日：2002-02-05

    Applicant: Richard Schreier ,  Lawrence Singer ,  Jennifer A. Lloyd

    Inventor： Richard Schreier ,  Lawrence Singer ,  Jennifer A. Lloyd

    IPC: H03M302

    CPC classification number: H03M3/484 ,  H03M3/482

    Abstract: A multi-bit sigma-delta analog to digital converter has a quantizer, a loop filter circuit, and a digital to analog feedback circuit. The quantizer, loop filter, and digital to analog feedback circuit have a loop gain associated therewith. The quantizer and loop filter have a combined gain associated therewith. The full-scale of the digital to analog feedback circuit is varied. The combined gain of the quantizer and loop filter is also varied. More specifically, the combined gain of the quantizer and loop filter is varied in inverse proportion to the full-scale of the digital to analog feedback circuit to maintain the loop gain at a substantially constant level.

    Accumulator for adaptive sigma-delta modulation
    7.
    发明授权
    Accumulator for adaptive sigma-delta modulation 有权
    用于自适应Σ-Δ调制的累加器

    公开(公告)号：US07339510B2

    公开(公告)日：2008-03-04

    申请号：US11668620

    申请日：2007-01-30

    Applicant: Clemens M. Zierhofer

    Inventor： Clemens M. Zierhofer

    IPC: H03M3/00

    CPC classification number: H03M3/482

    Abstract: A system and method for adaptive sigma-delta modulation. The system includes a input stage that produces a difference signal representing the difference between an analog input signal x(n) and a analog feedback signal z(n), the amplitude of the analog input signal x(n) within a first range [−a, +a]. An accumulator stage produces a accumulated signal that is a function of an accumulation of the difference signal, the accumulator stage transforming the accumulation of the difference signal so as to increase average magnitude while ensuring instantaneous magnitude does not exceed a predetermined value. A quantization stage produces a quantized digital signal y0(n) representing the accumulated signal. Based on the quantized digital signal y0(n), a adaptation stage produces a digital output signal z0(n), which is converted to the analog feedback signal z(n) by a digital-to-analog converter stage.

    Abstract translation: 一种用于自适应Σ-Δ调制的系统和方法。 该系统包括输入级，其产生表示模拟输入信号x（n）和模拟反馈信号z（n）之间的差的差信号，模拟输入信号x（n）的振幅在第一范围[ a，+ a]。 累加器级产生作为差分信号的累积的函数的累加信号，累加器级转换差分信号的累积，以便在确保瞬时幅度不超过预定值的同时增加平均幅度。 量化级产生表示累积信号的量化数字信号y 0（n）。 基于量化的数字信号y 0（n），适配级产生数字输出信号z 0（n），其被转换为模拟反馈信号z（ n）通过数模转换器级。

    Accumulator for Adaptive Sigma-Delta Modulation
    8.
    发明申请
    Accumulator for Adaptive Sigma-Delta Modulation 有权
    自适应Σ-Δ调制的累加器

    公开(公告)号：US20070120715A1

    公开(公告)日：2007-05-31

    申请号：US11668620

    申请日：2007-01-30

    Applicant: Clemens Zierhofer

    Inventor： Clemens Zierhofer

    IPC: H03M3/00

    CPC classification number: H03M3/482

    Abstract: A system and method for adaptive sigma-delta modulation. The system includes a input stage that produces a difference signal representing the difference between an analog input signal x(n) and a analog feedback signal z(n), the amplitude of the analog input signal x(n) within a first range [−a, +a]. An accumulator stage produces a accumulated signal that is a function of an accumulation of the difference signal, the accumulator stage transforming the accumulation of the difference signal so as to increase average magnitude while ensuring instantaneous magnitude does not exceed a predetermined value. A quantization stage produces a quantized digital signal y0(n) representing the accumulated signal. Based on the quantized digital signal y0(n), a adaptation stage produces a digital output signal z0(n), which is converted to the analog feedback signal z(n) by a digital-to-analog converter stage.

    Abstract translation: 一种用于自适应Σ-Δ调制的系统和方法。 该系统包括输入级，其产生表示模拟输入信号x（n）和模拟反馈信号z（n）之间的差的差信号，模拟输入信号x（n）的振幅在第一范围[ a，+ a]。 累加器级产生作为差分信号的累积的函数的累加信号，累加器级转换差分信号的累积，以便在确保瞬时幅度不超过预定值的同时增加平均幅度。 量化级产生表示累积信号的量化数字信号y 0（n）。 基于量化的数字信号y 0（n），适配级产生数字输出信号z 0（n），其被转换为模拟反馈信号z（ n）通过数模转换器级。

    Accumulator for adaptive sigma-delta modulation
    9.
    发明授权
    Accumulator for adaptive sigma-delta modulation 有权
    用于自适应Σ-Δ调制的累加器

    公开(公告)号：US07190295B2

    公开(公告)日：2007-03-13

    申请号：US11083672

    申请日：2005-03-18

    Applicant: Clemens M. Zierhofer

    Inventor： Clemens M. Zierhofer

    IPC: H03M3/00

    CPC classification number: H03M3/482

    Abstract: A system and method for adaptive sigma-delta modulation. The system includes a input stage that produces a difference signal representing the difference between an analog input signal x(n) and a analog feedback signal z(n), the amplitude of the analog input signal x(n) within a first range [−a, +a]. An accumulator stage produces a accumulated signal that is a function of an accumulation of the difference signal, the accumulator stage transforming the accumulation of the difference signal so as to increase average magnitude while ensuring instantaneous magnitude does not exceed a predetermined value. A quantization stage produces a quantized digital signal y0(n) representing the accumulated signal. Based on the quantized digital signal y0(n), a adaptation stage produces a digital output signal z0(n), which is converted to the analog feedback signal z(n) by a digital-to-analog converter stage.

    Abstract translation: 一种用于自适应Σ-Δ调制的系统和方法。 该系统包括输入级，其产生表示模拟输入信号x（n）和模拟反馈信号z（n）之间的差的差信号，模拟输入信号x（n）的振幅在第一范围[ a，+ a]。 累加器级产生作为差分信号的累积的函数的累加信号，累加器级转换差分信号的累积，以便在确保瞬时幅度不超过预定值的同时增加平均幅度。 量化级产生表示累积信号的量化数字信号y 0（n）。 基于量化的数字信号y 0（n），适配级产生数字输出信号z 0（n），其被转换为模拟反馈信号z（ n）通过数模转换器级。

    Accumulator for adaptive sigma-delta modulation
    10.
    发明申请
    Accumulator for adaptive sigma-delta modulation 有权
    用于自适应Σ-Δ调制的累加器

    公开(公告)号：US20050162297A1

    公开(公告)日：2005-07-28

    申请号：US11083672

    申请日：2005-03-18

    Applicant: Clemens Zierhofer

    Inventor： Clemens Zierhofer

    IPC: H03M3/02 ,  H03M3/00

    CPC classification number: H03M3/482

    Abstract: A system and method for adaptive sigma-delta modulation. The system includes a input stage that produces a difference signal representing the difference between an analog input signal x(n) and a analog feedback signal z(n), the amplitude of the analog input signal x(n) within a first range [−a, +a]. An accumulator stage produces a accumulated signal that is a function of an accumulation of the difference signal, the accumulator stage transforming the accumulation of the difference signal so as to increase average magnitude while ensuring instantaneous magnitude does not exceed a predetermined value. A quantization stage produces a quantized digital signal y0(n) representing the accumulated signal. Based on the quantized digital signal y0(n), a adaptation stage produces a digital output signal z0(n), which is converted to the analog feedback signal z(n) by a digital-to-analog converter stage.

    Abstract translation: 一种用于自适应Σ-Δ调制的系统和方法。 该系统包括输入级，其产生表示模拟输入信号x（n）和模拟反馈信号z（n）之间的差的差信号，模拟输入信号x（n）的振幅在第一范围[ a，+ a]。 累加器级产生作为差分信号的累积的函数的累加信号，累加器级转换差分信号的累积，以便在确保瞬时幅度不超过预定值的同时增加平均幅度。 量化级产生表示累积信号的量化数字信号y 0（n）。 基于量化的数字信号y 0（n），适配级产生数字输出信号z 0（n），其被转换为模拟反馈信号z（ n）通过数模转换器级。

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