公开(公告)号：US06767778B2

公开(公告)日：2004-07-27

申请号：US10230809

申请日：2002-08-29

Applicant: Zhongze Wang ,  Inna V. Patrick

Inventor： Zhongze Wang ,  Inna V. Patrick

IPC: H01L218234

CPC classification number: H01L29/6653 ,  H01L29/6656 ,  H01L29/6659

Abstract: A semiconductor device for reducing junction capacitance by an additional low dose super deep source/drain implant and a method for its fabrication are disclosed. In particular, the super deep implant is performed after spacer formation to significantly reduce junction capacitance in the channel region.

Abstract translation: 公开了一种用于通过附加的低剂量超深源极/漏极注入来减少结电容的半导体器件及其制造方法。 特别地，在间隔物形成之后进行超深度注入，以显着降低沟道区中的结电容。

公开(公告)号：US08120109B2

公开(公告)日：2012-02-21

申请号：US10896711

申请日：2004-07-22

Applicant: Zhongze Wang ,  Inna V. Patrick

Inventor： Zhongze Wang ,  Inna V. Patrick

IPC: H01L29/76

CPC classification number: H01L29/6653 ,  H01L29/6656 ,  H01L29/6659

Abstract: A semiconductor device for reducing junction capacitance by an additional low dose super deep source/drain implant and a method for its fabrication are disclosed. In particular, the super deep implant is performed after spacer formation to significantly reduce junction capacitance in the channel region.

Abstract translation: 公开了一种用于通过附加的低剂量超深源极/漏极注入来减少结电容的半导体器件及其制造方法。 特别地，在间隔物形成之后进行超深度注入，以显着降低沟道区中的结电容。