FLASH MEMORY SYSTEM AND WORD LINE INTERLEAVING METHOD THEREOF
    1.
    发明申请
    FLASH MEMORY SYSTEM AND WORD LINE INTERLEAVING METHOD THEREOF 审中-公开
    闪存存储器系统及其线路交换方法

    公开(公告)号:US20140355348A1

    公开(公告)日:2014-12-04

    申请号:US14459736

    申请日:2014-08-14

    IPC分类号: G11C16/10 G11C16/04

    摘要: Provided are a flash memory system and a word line interleaving method thereof. The flash memory system includes a memory cell array, and a word line interleaving logic. The memory cell array is connected to a plurality of word lines. The word line (WL) interleaving logic performs an interleaving operation on WL data corresponding to at least two different wordlines and programming data, including the interleaved data, to the memory cell array.

    摘要翻译: 提供一种闪速存储器系统及其字线交错方法。 闪存系统包括存储单元阵列和字线交错逻辑。 存储单元阵列连接到多个字线。 字线(WL)交织逻辑对与至少两个不同字线对应的WL数据和包括交错数据的编程数据执行对存储单元阵列的交织操作。

    FLASH MEMORY SYSTEM AND WORD LINE INTERLEAVING METHOD THEREOF
    2.
    发明申请
    FLASH MEMORY SYSTEM AND WORD LINE INTERLEAVING METHOD THEREOF 有权
    闪存存储器系统及其线路交换方法

    公开(公告)号:US20120069664A1

    公开(公告)日:2012-03-22

    申请号:US13236176

    申请日:2011-09-19

    IPC分类号: G11C16/10 G11C16/04

    摘要: Provided are a flash memory system and a word line interleaving method thereof. The flash memory system includes a memory cell array, and a word line interleaving logic. The memory cell array is connected to a plurality of word lines. The word line (WL) interleaving logic performs an interleaving operation on WL data corresponding to at least two different wordlines and programming data, including the interleaved data, to the memory cell array.

    摘要翻译: 提供一种闪速存储器系统及其字线交错方法。 闪存系统包括存储单元阵列和字线交错逻辑。 存储单元阵列连接到多个字线。 字线(WL)交织逻辑对与至少两个不同字线对应的WL数据和包括交错数据的编程数据执行对存储单元阵列的交织操作。

    STORAGE DEVICE AND OPERATING METHOD OF STORAGE DEVICE
    3.
    发明申请
    STORAGE DEVICE AND OPERATING METHOD OF STORAGE DEVICE 有权
    存储设备的存储设备和操作方法

    公开(公告)号:US20160011807A1

    公开(公告)日:2016-01-14

    申请号:US14640653

    申请日:2015-03-06

    IPC分类号: G06F3/06

    摘要: The operating method of the storage device includes receiving write data to be written at the plurality of memory cells; determining whether the received write data is LSB data to be written at the plurality of memory cells; and encoding the write data according to the determination. The write data is encoded according to the write data when the write data is LSB data to be written at the plurality of memory cells. The write data is encoded according to the write data and encoding data of lower data of the write data to be written at the plurality of memory cells when the write data is not LSB data to be written at the plurality of memory cells.

    摘要翻译: 存储装置的操作方法包括:接收要写入多个存储单元的写入数据; 确定所接收的写入数据是否要被写入所述多个存储器单元的LSB数据; 以及根据确定对写入数据进行编码。 当写入数据是要写入多个存储器单元的LSB数据时,根据写入数据对写入数据进行编码。 当写入数据不是要写入多个存储器单元的LSB数据时,写数据根据写数据和要写入多个存储单元的写数据的较低数据的编码数据进行编码。

    SEMICONDUCTOR MEMORY SYSTEMS USING REGRESSION ANALYSIS AND READ METHODS THEREOF
    5.
    发明申请
    SEMICONDUCTOR MEMORY SYSTEMS USING REGRESSION ANALYSIS AND READ METHODS THEREOF 审中-公开
    使用回归分析的半导体存储器系统及其读取方法

    公开(公告)号:US20150332778A1

    公开(公告)日:2015-11-19

    申请号:US14811222

    申请日:2015-07-28

    IPC分类号: G11C16/26

    摘要: A memory system includes: a bit counter and a regression analyzer. The bit counter is configured to generate a plurality of count values based on data read from selected memory cells using a plurality of different read voltages, each of the plurality of count values being indicative of a number of memory cells of a memory device having threshold voltages between pairs of the plurality of different read voltages. The regression analyzer is configured to determine read voltage for the selected memory cells based on the plurality of count values using regression analysis.

    摘要翻译: 存储器系统包括:位计数器和回归分析器。 位计数器被配置为基于使用多个不同的读取电压从所选择的存储器单元读取的数据生成多个计数值,多个计数值中的每一个表示具有阈值电压的存储器件的存储单元的数量 在多个不同读取电压的对之间。 回归分析器被配置为使用回归分析来基于多个计数值来确定所选择的存储器单元的读取电压。

    STORAGE DEVICE AND METHOD OF WRITING AND READING THE SAME
    6.
    发明申请
    STORAGE DEVICE AND METHOD OF WRITING AND READING THE SAME 有权
    存储装置及其写入和读取方法

    公开(公告)号:US20150006791A1

    公开(公告)日:2015-01-01

    申请号:US14297093

    申请日:2014-06-05

    IPC分类号: G06F12/02

    摘要: A write method of a storage device including at least one nonvolatile memory device and a memory controller controlling the nonvolatile memory device includes dividing write data into a plurality of page data groups, each page data group including multiple bits of data; encoding the divided page data groups using different binary codes, respectively; mapping the encoded page data groups; programming, in first memory cells connected to one word line, programming states to which binary values of each of the mapped encoded page data groups are mapped, such that, the plurality of page data groups correspond respectively to a plurality of read voltage levels, and for each of the plurality of page data groups, the page data group can be read by performing a single read operation on the first memory cells using the read voltage level corresponding to the page data group.

    摘要翻译: 一种存储装置的写入方法,包括至少一个非易失性存储器件和控制非易失性存储器件的存储器控​​制器,包括将写入数据划分成多个页数据组,每个页数据组包括多位数据; 分别使用不同的二进制码对分割页数据组进行编码; 映射编码页数据组; 在连接到一个字线的第一存储器单元中对编程状态进行编程,对每个映射编码页数据组的二进制值进行映射的编程状态,使得多个页数据组分别对应于多个读电压电平,以及 对于多个页面数据组中的每一个,可以通过使用与页面数据组对应的读取电压电平对第一存储器单元执行单个读取操作来读取页面数据组。

    MEMORY CONTROLLER CHANGING PARTIAL DATA IN MEMORY DEVICE AND METHOD FOR CHANGING PARTIAL DATA THEREOF
    7.
    发明申请
    MEMORY CONTROLLER CHANGING PARTIAL DATA IN MEMORY DEVICE AND METHOD FOR CHANGING PARTIAL DATA THEREOF 有权
    存储器控制器更改存储器件中的部分数据和更改其部分数据的方法

    公开(公告)号:US20140136920A1

    公开(公告)日:2014-05-15

    申请号:US14071771

    申请日:2013-11-05

    IPC分类号: G06F11/10

    摘要: A partial data changing method of a memory controller includes receiving a request to change partial data from a host; detecting an error of old data, the old data being partial data read from a memory device using an error detection code; if the old data is not erroneous, calculating a data difference between new data provided from the host and the old data, and calculating a new parity using the data difference and an old parity read from the memory device; and storing the new data and the new parity at the memory device.

    摘要翻译: 存储器控制器的部分数据改变方法包括从主机接收改变部分数据的请求; 检测旧数据的错误,旧数据是使用错误检测码从存储装置读取的部分数据; 如果旧数据不是错误的,则计算从主机提供的新数据与旧数据之间的数据差异,并且使用从存储器件读取的数据差和旧奇偶校验来计算新奇偶校验; 以及将新数据和新奇偶校验存储在存储器件中。

    METHOD AND DEVICE OF JUDGING COMPRESSED DATA AND DATA STORAGE DEVICE INCLUDING THE SAME
    8.
    发明申请
    METHOD AND DEVICE OF JUDGING COMPRESSED DATA AND DATA STORAGE DEVICE INCLUDING THE SAME 审中-公开
    评估压缩数据的方法和装置以及包括其的数据存储装置

    公开(公告)号:US20120144148A1

    公开(公告)日:2012-06-07

    申请号:US13241352

    申请日:2011-09-23

    IPC分类号: G06F12/00

    摘要: A write method of a data storage device including a storage media includes receiving data to be stored in the storage media; judging whether the received data is compressed data, without externally provided additional information; and selectively compressing the received data according to the judgment result, wherein the judging whether the received data is compressed data is made based on a distribution of actual symbols included in at least part of the received data.

    摘要翻译: 包括存储介质的数据存储设备的写入方法包括接收要存储在存储介质中的数据; 判断接收到的数据是否为压缩数据,无需外部提供的附加信息; 以及根据判断结果选择性地压缩接收到的数据,其中基于包含在所接收的数据的至少一部分中的实际符号的分布来判断所接收的数据是否是压缩数据。

    SEMICONDUCTOR MEMORY SYSTEMS USING REGRESSION ANALYSIS AND READ METHODS THEREOF
    9.
    发明申请
    SEMICONDUCTOR MEMORY SYSTEMS USING REGRESSION ANALYSIS AND READ METHODS THEREOF 有权
    使用回归分析的半导体存储器系统及其读取方法

    公开(公告)号:US20140119124A1

    公开(公告)日:2014-05-01

    申请号:US14062092

    申请日:2013-10-24

    IPC分类号: G11C16/26

    摘要: A memory system includes: a bit counter and a regression analyzer. The bit counter is configured to generate a plurality of count values based on data read from selected memory cells using a plurality of different read voltages, each of the plurality of count values being indicative of a number of memory cells of a memory device having threshold voltages between pairs of the plurality of different read voltages. The regression analyzer is configured to determine read voltage for the selected memory cells based on the plurality of count values using regression analysis.

    摘要翻译: 存储器系统包括:位计数器和回归分析器。 位计数器被配置为基于使用多个不同的读取电压从所选择的存储器单元读取的数据生成多个计数值,多个计数值中的每一个表示具有阈值电压的存储器件的存储单元的数量 在多个不同读取电压的对之间。 回归分析器被配置为使用回归分析来基于多个计数值来确定所选择的存储器单元的读取电压。