摘要:
A disclosed dual antenna system includes a receiving antenna which includes a first surface orthogonal to an incident wave, the first surface being a first antenna aperture, and a transmitting antenna which includes a second surface parallel to a reflection direction which is a transmission direction, the second surface being a second antenna aperture. A portion of a structure of the transmitting antenna is shared by the receiving antenna.
摘要:
An apparatus having multiple mushroom structures is disclosed. Each of the multiple mushroom structures includes: a ground plate; a first patch provided parallel to the ground plate with a separation of a distance to the ground plate; and a second patch provided parallel to the ground plate with a separation of another distance to the ground plate, which another distance being different from the distance from the first patch to the ground plate, wherein the second patch is a passive element which is capacitatively coupled with at least the first patch.
摘要:
A propagation path estimation method using an imaging method according to the invention includes a step of, in a case where a reflect array 1 (structure) which causes reflection and scattering in a predetermined direction (θ-η)° different from a specular reflection direction θ° exists on a propagation path, rotating the reflect array 1 by η/2° about a rotation center O to set a virtual rotated reflect array 2 (virtual structure), and estimating the propagation path by using the virtual rotated reflect array 2.
摘要:
There is provided an image forming mechanism including: an image carrier containing a lubricant in a photosensitive layer that is formed on a surface of the image carrier, and on which an electrostatic latent image is formed; a developing section developing the electrostatic latent image into a visible image by a developer that contains the lubricant; and a cleaning member formed with a first layer that contacts the photosensitive layer, and a second layer that is formed of a material having a lower modulus of repulsion elasticity than the first layer and that is layered with the first layer and that does not contact the surface of the image carrier.
摘要:
A semiconductor chip includes a first power supply line and a second power supply line. A first switch is coupled between the first power supply line and the second power supply line, and a second switch is coupled between the first power supply line and the second power supply line. A circuit is coupled to the second power supply line. A first control signal line is coupled to the first switch, and a second control signal line coupled to the second switch. A logic gate is coupled to the first and the second control signal lines and a terminal is coupled to the logic gate to output a signal to an outside of the semiconductor chip.
摘要:
A semiconductor device according to one aspect of the present invention includes: a flip-flop; a clock control circuit that controls a clock signal supplied to the flip-flop; and a controller that supplies a data retention signal to the flip-flop and controls the clock control circuit. When the flip-flop is driven by a negative edge of the clock signal and retains data when the clock signal is at a high level, the controller controls the clock control circuit so as to supply a high-level clock signal to the flip-flop after the input clock signal is fixed and before the flip-flop retains data. This prevents the occurrence of unintended latching of data when the flip-flop having a retention function retains data.
摘要:
An apparatus having multiple mushroom structures is disclosed. Each of the multiple mushroom structures including: a ground plate; a first patch provided parallel to the ground plate with a separation of a distance to the ground plate; and a second patch provided parallel to the ground plate with a separation of another distance to the ground plate, which another distance being different from the distance from the first patch to the ground plate, wherein the second patch is a passive element which is capacitatively coupled with at least the first patch.
摘要:
A method and apparatus for estimating whether or not a wireless terminal is indoors are disclosed. The illustrative embodiment employs a pattern classifier that is trained on a plurality of input/output mappings, where each mapping corresponds to a respective location, the output of the mapping is a Boolean value that indicates whether the location is indoors, and the input of the mapping is based on empirical and predicted signal data for the location. In accordance with the illustrative embodiment, a computer-executable program is generated based on the trained pattern classifier. The computer-executable program estimates whether or not a wireless terminal is indoors based on empirical data reported by the terminal, and on a location estimate for the terminal that might be crude or inaccurate (e.g., based on Cell Identifier [Cell-ID], GPS, etc.).
摘要:
It is an object of the present invention to perform positioning at the proper positioning time and positioning precision in response to a requirement with respect to positioning. A positioning server 10 comprises a first positioning component 12 that performs positioning of a cellular terminal 20 by a hybrid algorithm 1, in which indoor/outdoor determination is performed on the basis of reception state information indicating the reception state at the cellular terminal 20, and in which an end condition is determined on the basis of the result of the indoor/outdoor determination; and a second positioning component 13 that performs positioning of the cellular terminal 20 by a hybrid algorithm 2, in which the approximate position of the cellular terminal 20 is calculated on the basis of reception state information indicating the reception state at the cellular terminal 20, and in which whether or not to end the positioning of the cellular terminal 20 is decided on the basis of the precision of the approximated position.
摘要:
Provided is a semiconductor integrated circuit capable of testing power control operation in the semiconductor integrated circuit including a power controllable region. Power control switches have switch series each constituted by a plurality of switch cells. A power controllable region includes output nodes in the switch series. The output nodes output power control signals that have passed through final stages of the respective switch series of the power control switches to the outside of the power controllable region. A chip on which the semiconductor integrated circuit is mounted has output terminals that output outputs of the output nodes to the outside of the chip. In the case of inserting a scan path test, observation flip-flops that load the outputs of the output nodes to data terminals, and load scan data to scan-in terminals are disposed in correspondence with the respective output nodes. Those observation flip-flops are connected to constitute a scan path chain.