公开(公告)号：US08988125B1

公开(公告)日：2015-03-24

申请号：US14056154

申请日：2013-10-17

Applicant: Xilinx, Inc.

Inventor： Ilya K. Ganusov ,  Manu Jose

IPC: H03H11/26 ,  H03K5/14

CPC classification number: H03K5/14

Abstract: A circuit for routing signals in an integrated circuit is disclosed. The circuit comprises a path having a plurality of registers coupled in series and including a source register, a destination register and at least one intermediate register; a clock generator generating a clock signal; and a delay element coupled to receive the clock signal and generate a delayed clock signal, wherein the delayed clock signal is coupled to a clock input of the at least one intermediate register. A method of routing signals in an integrated circuit is also disclosed.

Abstract translation: 公开了一种用于在集成电路中路由信号的电路。 电路包括具有串联耦合的多个寄存器的路径，包括源寄存器，目的地寄存器和至少一个中间寄存器; 产生时钟信号的时钟发生器; 以及延迟元件，其耦合以接收所述时钟信号并产生延迟的时钟信号，其中所述延迟的时钟信号耦合到所述至少一个中间寄存器的时钟输入。 还公开了一种在集成电路中路由信号的方法。