公开(公告)号：US11018140B2

公开(公告)日：2021-05-25

申请号：US16389322

申请日：2019-04-19

Applicant: Winbond Electronics Corp.

Inventor： Yi-Hao Chien ,  Kazuaki Takesako ,  Kai Jen ,  Hung-Yu Wei

IPC: H01L27/108 ,  H01L21/764

Abstract: A semiconductor device and a manufacturing method of the same are provided. The method includes forming a plurality of first conductive structures and a first dielectric layer between the first conductive structures on a substrate. The method also includes forming a trench between the first dielectric layer and the first conductive structures. The method further includes forming a liner material on a sidewall and a bottom of the trench. In addition, the method includes forming a conductive plug on the liner material in the trench. The method also includes removing the liner material to form an air gap, and the air gap is located between the conductive plug and the first dielectric layer.

公开(公告)号：US09613967B1

公开(公告)日：2017-04-04

申请号：US15083302

申请日：2016-03-29

Applicant: Winbond Electronics Corp.

Inventor： Yi-Hao Chien ,  Yoshinori Tanaka ,  Wei-Che Chang

IPC: H01L27/108

CPC classification number: H01L27/10894 ,  H01L27/10855 ,  H01L27/10897

Abstract: A method of fabricating a memory device includes providing a substrate having a first region and a second region. A first dielectric layer is formed on the substrate in the first region. A conductive layer is formed on the substrate in the second region. A top surface of the conductive layer is lower than a top surface of the first dielectric layer. A second dielectric layer is formed on the substrate. A portion of the second dielectric layer and a portion of the conductive layer are removed to form a first opening in the conductive layer and the second dielectric layer in the second region. The first opening exposes a surface of the substrate. A portion of the substrate in the second region is removed to form a trench in the substrate in the second region. A third dielectric layer is formed in the trench and the first opening.

公开(公告)号：US11631675B2

公开(公告)日：2023-04-18

申请号：US17160871

申请日：2021-01-28

Applicant: Winbond Electronics Corp.

Inventor： Yu-Po Wang ,  Yi-Hao Chien ,  Hsiang-Po Liu

IPC: H01L27/108 ,  H01L29/06

Abstract: A semiconductor memory structure includes a semiconductor substrate including an active region and a chop region. The semiconductor memory structure also includes an isolation structure disposed in the chop region, a first gate structure extending at least through the isolation structure in the chop region, and a second gate structure extending at least through the active region. The semiconductor memory structure also includes a doped region disposed in the active region. A first distance between the doped region and the first gate structure is shorter than a second distance between the doped region and the second gate structure.

公开(公告)号：US11211386B2

公开(公告)日：2021-12-28

申请号：US16409893

申请日：2019-05-13

Applicant: Winbond Electronics Corp.

Inventor： Ming-Chih Hsu ,  Yi-Hao Chien ,  Huang-Nan Chen

IPC: H01L27/108 ,  H01L23/528

Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a dielectric layer disposed on the substrate, bit lines disposed on the dielectric layer, spacers and a contact. The substrate has active areas arranged in parallel with each other. The bit lines are arranged in parallel with each other. Each bit line is partially overlapped with the corresponding active area. Each bit line has first portions and second portions arranged alternately in an extending direction thereof, and a width of the first portions is smaller than that of the second portions. The spacers are disposed on the sidewalls of each bit line. The contact is disposed between the adjacent bit lines and adjacent to the corresponding first portion of at least one of the adjacent bit lines, penetrates through the dielectric layer, and is in contact with the corresponding active area.

公开(公告)号：US11101179B2

公开(公告)日：2021-08-24

申请号：US16508875

申请日：2019-07-11

Applicant: Winbond Electronics Corp.

Inventor： Kai Jen ,  Li-Ting Wang ,  Yi-Hao Chien

IPC: H01L21/8234 ,  H01L27/108 ,  H01L21/768

Abstract: A semiconductor structure includes a semiconductor substrate, a gate stack disposed over the semiconductor substrate, a first oxide spacer disposed along a sidewall of the gate stack, a protection portion disposed over the first oxide spacer, and an interlayer dielectric layer disposed over the semiconductor substrate. The first oxide spacer and the protection portion are disposed between the gate stack and the interlayer dielectric layer.