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公开(公告)号：US20220187510A1
公开(公告)日：2022-06-16
申请号：US17215231
申请日：2021-03-29
发明人： YUAN-HAO JIN , QUN-QING LI , SHOU-SHAN FAN
IPC分类号： G02B5/00 , B05D1/02 , B05D5/06 , C01B32/174
摘要： A light absorber includes a plurality of carbon nanotubes and a plurality of carbon particles. The plurality of carbon nanotubes is entangled with each other to form a network structure. The plurality of carbon particles is located in the network structure.
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公开(公告)号：US20220181476A1
公开(公告)日：2022-06-09
申请号：US17206793
申请日：2021-03-19
发明人： TIAN-FU ZHANG , LI-HUI ZHANG , YUAN-HAO JIN , QUN-QING LI , SHOU-SHAN FAN
IPC分类号： H01L29/76 , H01L29/06 , H01L29/16 , H01L29/417 , H01L29/423 , H01L29/786 , H01L21/02 , H01L21/78 , H01L21/04 , H01L29/66
摘要： A method for making a field effect transistor includes providing a graphene nanoribbon composite structure. The graphene nanoribbon composite structure includes a substrate and a plurality of graphene nanoribbons spaced apart from each other. The substrate includes a plurality of protrusions spaced apart from each other, and one of the plurality of graphene nanoribbons is on the substrate and between two adjacent protrusions. An interdigital electrode is placed on the graphene nanoribbon composite structure, and the interdigital electrode covers the plurality of protrusions and is electrically connected to the plurality of graphene nanoribbons.
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3.发明申请公开(公告)号：US20180219044A1
公开(公告)日：2018-08-02
申请号：US15927293
申请日：2018-03-21
发明人： YU-DAN ZHAO , QUN-QING LI , XIAO-YANG XIAO , GUAN-HONG LI , YUAN-HAO JIN , SHOU-SHAN FAN
CPC分类号： H01L27/283 , H01L27/281 , H01L51/0003 , H01L51/0048 , H01L51/0097 , H01L51/0512 , H01L51/0541 , H01L51/0545 , H01L51/055 , H01L51/105 , H01L2251/301 , H01L2251/303
摘要： A metal oxide semiconductor carbon nanotube thin film transistor circuit includes a p-type carbon nanotube thin film transistor and an n-type carbon nanotube thin film transistor stacked on one another. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.
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公开(公告)号：US20180212173A1
公开(公告)日：2018-07-26
申请号：US15846215
申请日：2017-12-19
发明人： YU-DAN ZHAO , XIAO-YANG XIAO , YING-CHENG WANG , YUAN-HAO JIN , TIAN-FU ZHANG , QUN-QING LI
CPC分类号： H01L51/0579 , H01L51/0005 , H01L51/0048 , H01L51/0096 , H01L51/0545 , H01L51/055 , H01L51/0558 , H01L51/102
摘要： A thin film transistor includes a gate electrode, a insulating medium layer and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating medium layer. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode, the second end is located on the surface of the insulating medium layer. The semiconducting structure includes a carbon nanotube structure. The second electrode is located on the second end.
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公开(公告)号：US20180159057A1
公开(公告)日：2018-06-07
申请号：US15817540
申请日：2017-11-20
发明人： YU-DAN ZHAO , YU-JIA HUO , XIAO-YANG XIAO , YING-CHENG WANG , TIAN-FU ZHANG , YUAN-HAO JIN , QUN-QING LI , SHOU-SHAN FAN
IPC分类号： H01L51/05 , H01L29/786 , H01L21/285 , H01L27/12 , H01L27/32 , H01L51/00
CPC分类号： H01L51/0558 , H01L21/2855 , H01L27/0688 , H01L27/1218 , H01L27/124 , H01L27/1259 , H01L27/3262 , H01L29/513 , H01L29/778 , H01L29/78681 , H01L29/7869 , H01L51/0023 , H01L51/0026 , H01L51/0048 , H01L51/0516 , H01L51/055 , H03K19/094
摘要： The disclosure relates to a logic circuit. The logic circuit includes a n-type thin film transistor and a p-type thin film transistor. Each thin film transistor includes a substrate; a semiconductor layer including nano-scaled semiconductor materials; a source and a drain, wherein the source and the drain are spaced apart from each other, and electrically connected to the semiconductor layer; a dielectric layer covering the semiconductor layer, wherein the dielectric layer includes a normal dielectric layer and an abnormal dielectric layer stacked on one another, and the abnormal dielectric layer is an oxide dielectric layer grown by magnetron sputtering; and a gate in direct contact with the abnormal dielectric layer. The n-type thin film transistor and the p-type thin film transistor share the same substrate and the same gate.
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公开(公告)号：US20180158905A1
公开(公告)日：2018-06-07
申请号：US15817513
申请日：2017-11-20
发明人： YU-DAN ZHAO , YU-JIA HUO , XIAO-YANG XIAO , YING-CHENG WANG , TIAN-FU ZHANG , YUAN-HAO JIN , QUN-QING LI , SHOU-SHAN FAN
摘要： The disclosure relates to a thin film transistor and a method for making the same. The thin film transistor includes a substrate; a semiconductor layer on the substrate, wherein the semiconductor layer includes nano-scaled semiconductor materials; a source and a drain, wherein the source and the drain are on the substrate, spaced apart from each other, and electrically connected to the semiconductor layer; a dielectric layer on the semiconductor layer, wherein the dielectric layer is an oxide dielectric layer formed by magnetron sputtering; and a gate in direct contact with the dielectric layer. The thin film transistor has inverse current hysteresis.
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公开(公告)号：US20160225936A1
公开(公告)日：2016-08-04
申请号：US15099521
申请日：2016-04-14
发明人： YUAN-HAO JIN , QUN-QING LI , SHOU-SHAN FAN
IPC分类号： H01L31/18
CPC分类号： H01L31/18 , H01L31/022425 , H01L31/02363 , H01L31/035209 , H01L31/068 , Y02E10/547
摘要： A solar cell is provided. The solar cell includes a silicon substrate, a back electrode, a doped silicon layer, and an upper electrode. The silicon substrate includes a first surface, a second surface, and a number of three-dimensional nano-structures located on the first surface. The three-dimensional nano-structures are located on the second surface. The three-dimensional nano-structures are linear protruding structures that are spaced from each other, and a cross section of each linear protruding structure is an arc. The doped silicon layer is attached to the three-dimensional nano-structures and the second surface between the three-dimensional nano-structures.
摘要翻译： 提供太阳能电池。 太阳能电池包括硅衬底，背电极，掺杂硅层和上电极。 硅衬底包括位于第一表面上的第一表面，第二表面和多个三维纳米结构。 三维纳米结构位于第二表面上。 三维纳米结构是彼此间隔开的线性突出结构，每个线性突出结构的横截面是弧形。 掺杂硅层附着到三维纳米结构和三维纳米结构之间的第二表面。
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公开(公告)号：US20160190493A1
公开(公告)日：2016-06-30
申请号：US14985252
申请日：2015-12-30
发明人： GUAN-HONG LI , QUN-QING LI , YUAN-HAO JIN , SHOU-SHAN FAN
CPC分类号： H01L51/107 , H01L51/0048 , H01L51/0096 , H01L51/0525 , H01L51/0529 , H01L51/0541 , H01L51/0545 , H01L51/0558 , Y02E10/549
摘要： An N-type thin film transistor includes an insulating substrate, a semiconductor carbon nanotube layer, an MgO layer, a functional dielectric layer, a source electrode, a drain electrode, and a gate electrode. The semiconductor carbon nanotube layer is located on the insulating substrate. The source electrode and the drain electrode electrically connect the semiconductor carbon nanotube layer, wherein the source electrode and the drain electrode are spaced from each other, and a channel is defined in the semiconductor carbon nanotube layer between the source electrode and the drain electrode. The MgO layer is located on the semiconductor carbon nanotube layer. The functional dielectric layer covers the MgO layer. The gate electrode is located on the functional dielectric layer.
摘要翻译： N型薄膜晶体管包括绝缘基板，半导体碳纳米管层，MgO层，功能介电层，源电极，漏电极和栅电极。 半导体碳纳米管层位于绝缘基板上。 源电极和漏电极电连接半导体碳纳米管层，其中源电极和漏极彼此间隔开，并且在源电极和漏电极之间的半导体碳纳米管层中限定沟道。 MgO层位于半导体碳纳米管层上。 功能介电层覆盖MgO层。 栅电极位于功能电介质层上。
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9.发明申请METHOD OF MAKING N-TYPE SEMICONDUCTOR LAYER AND METHOD OF MAKING N-TYPE THIN FILM TRANSISTOR 有权制造N型半导体层的方法及制造N型薄膜晶体管的方法公开(公告)号：US20150364706A1
公开(公告)日：2015-12-17
申请号：US14735138
申请日：2015-06-10
发明人： YUAN-HAO JIN , QUN-QING LI , SHOU-SHAN FAN
CPC分类号： H01L51/0525 , H01L51/002 , H01L51/0048 , H01L51/0541 , H01L51/0545
摘要： A method of making N-type semiconductor layer includes following steps. A semiconductor carbon nanotube layer is provided. A hafnium oxide layer is deposited on the semiconductor carbon nanotube layer via atomic layer deposition, wherein the atomic layer deposition includes following substeps. The semiconductor carbon nanotube layer is located into an atomic layer deposition system. The semiconductor carbon nanotube layer is heated to a temperature ranging from about 140° C. to about 200° C. A protective gas is continuously introduced into the atomic layer deposition system. The hafnium oxide layer is formed on the semiconductor carbon nanotube layer via introducing hafnium source and water vapor one by one into the atomic layer deposition system in a pulse manner.
摘要翻译： 制造N型半导体层的方法包括以下步骤。 提供半导体碳纳米管层。 氧化铪层通过原子层沉积沉积在半导体碳纳米管层上，其中原子层沉积包括以下子步骤。 半导体碳纳米管层位于原子层沉积系统中。 将半导体碳纳米管层加热至约140℃至约200℃的温度。保护气体连续引入原子层沉积系统。 通过将铪源和水蒸气以脉冲方式逐个引入到原子层沉积系统中，在半导体碳纳米管层上形成氧化铪层。
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公开(公告)号：US20130260491A1
公开(公告)日：2013-10-03
申请号：US13728018
申请日：2012-12-27
发明人： YUAN-HAO JIN , QUN-QING LI , SHOU-SHAN FAN
IPC分类号： H01L33/22
CPC分类号： H01L33/22 , H01L33/0095 , H01L33/20 , H01L2933/0083
摘要： A method for making a LED comprises following steps. A substrate having a first surface and a second surface is provided. A patterned mask layer is applied on a first surface. A number of three-dimensional nano-structures are formed on the first surface and the patterned mask layer is removed. A first semiconductor layer, an active layer and a second semiconductor layer are formed on the second surface. A first electrode and a second electrode are formed to electrically connect with the first semiconductor layer and the second semiconductor pre-layer respectively.
摘要翻译： 制造LED的方法包括以下步骤。 提供具有第一表面和第二表面的基底。 图案化掩模层被施加在第一表面上。 在第一表面上形成多个三维纳米结构，并去除图案化的掩模层。 在第二表面上形成第一半导体层，有源层和第二半导体层。 第一电极和第二电极形成为分别与第一半导体层和第二半导体预层电连接。
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