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    Semiconductor process variation detector
    1.
    发明授权
    Semiconductor process variation detector 有权

    公开(公告)号：US11476760B2

    公开(公告)日：2022-10-18

    申请号：US16927558

    申请日：2020-07-13

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Robert Allan Neidorff ,  Saurav Bandyopadhyay ,  Ramanathan Ramani

    IPC: H02M3/158 ,  H02M1/08 ,  H02M3/157

    Abstract: In some examples, a system includes a voltage source terminal, a voltage reference terminal, a field effect transistor (FET), a current source, a comparator, and adjustment circuitry. The FET has a gate terminal and a non-gate terminal, the gate terminal coupled to the voltage source terminal. The current source is coupled to the non-gate terminal. The comparator has a comparator output and first and second comparator inputs, the first comparator input coupled to the non-gate terminal, and the second comparator input coupled to the voltage reference terminal. The adjustment circuitry has a circuitry input and a circuitry output, the circuitry input coupled to the comparator output, and the adjustment circuitry configured to adjust the circuitry output responsive to the circuitry input, in which the adjustment reduces a drive strength of the circuit.

    Adaptive synchronous rectification in a voltage converter
    2.
    发明授权
    Adaptive synchronous rectification in a voltage converter 有权

    公开(公告)号：US11018582B2

    公开(公告)日：2021-05-25

    申请号：US16399793

    申请日：2019-04-30

    Applicant: Texas Instruments Incorporated

    Inventor： Saurav Bandyopadhyay ,  Michael G. Amaro ,  Michael Thomas DiRenzo ,  Thomas Matthew LaBella ,  Robert Allan Neidorff

    IPC: H02M3/158 ,  H02M3/157 ,  H03K5/24 ,  H02M1/08 ,  H02M1/00

    Abstract: A circuit includes a first transistor and a second transistor coupled to the first transistor at a switch node and to a ground node. An estimator circuit receives a first signal to control an on and off state of the first transistor. The estimator circuit generates a second signal to control the on and off state of the second transistor. The second signal has a pulse width based on a pulse width of the first signal. A clocked comparator includes a clock input, a first input, and a second input. The first input receives a voltage indicative of a voltage of the switch node. The second input is coupled to a ground node. The clock input receives a third signal indicative of the second signal. The clocked comparator generates a comparator output signal. The estimator circuit adjusts the pulse width of the second signal based on the comparator output signal.

    Progressive power converter drive
    5.
    发明授权
    Progressive power converter drive 有权

    公开(公告)号：US11677323B2

    公开(公告)日：2023-06-13

    申请号：US17135532

    申请日：2020-12-28

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Robert Allan Neidorff ,  Robert Kenneth Oppen

    IPC: H02M3/158 ,  H02M3/157 ,  H02M1/00

    CPC classification number: H02M3/1582 ,  H02M1/0038 ,  H02M3/157

    Abstract: In at least some examples, an apparatus includes a logic circuit, first transistor, and second transistor. The logic circuit has a first logic circuit output, and a second logic circuit output. The first transistor has a first transistor gate, a first transistor source, and a first transistor drain, the first transistor gate coupled to the first logic circuit output, the first transistor drain adapted to couple to a voltage source, and the first transistor source coupled to a switching terminal. The second transistor has a second transistor gate, a second transistor source, and a second transistor drain, the second transistor gate coupled to the second logic circuit output, the second transistor drain adapted to couple to the voltage source, and the second transistor source coupled to the switching terminal, wherein a transistor width of the second transistor is larger than a transistor width of the first transistor.

    Digital bit generators for trim circuits
    6.
    发明授权
    Digital bit generators for trim circuits 有权

    公开(公告)号：US11521695B1

    公开(公告)日：2022-12-06

    申请号：US17347236

    申请日：2021-06-14

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Robert Allan Neidorff

    IPC: G11C29/02 ,  G11C5/14

    Abstract: In some examples, a circuit comprises a first polyfuse and a first diode having a first diode anode and a first diode cathode, where the first diode anode is coupled to the first polyfuse. The circuit comprises a second polyfuse coupled to the first polyfuse and a second diode having a second diode anode and a second diode cathode, where the second diode cathode is coupled to the second polyfuse. The circuit comprises a probe pad coupled to the first diode cathode and the second diode anode.

    Power transistor leakage current with gate voltage less than threshold
    7.
    发明授权
    Power transistor leakage current with gate voltage less than threshold 有权

    公开(公告)号：US11085961B2

    公开(公告)日：2021-08-10

    申请号：US16226318

    申请日：2018-12-19

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Robert Allan Neidorff ,  Henry Litzmann Edwards

    IPC: G01R31/26 ,  G01R31/30 ,  G01R19/00 ,  G01R19/165 ,  G01R31/50

    Abstract: An example method provides a power MOSFET, a voltage source coupled to the power MOSFET, and a current measurement device coupled to a first non-control terminal of the power MOSFET. The voltage source, the current measurement device, and a second non-control terminal of the power MOSFET couple to ground. The method uses the voltage source to apply a voltage between a gate terminal and the second non-control terminal of the power MOSFET, the voltage greater than zero volts and less than a threshold voltage of the power MOSFET. The method also uses the current measurement device to measure a first current flowing through the first non-control terminal while applying the voltage. The method further uses the first current to predict a second current through the first non-control terminal for a voltage between the gate terminal and the second non-control terminal that is approximately zero.

    Switch controller having a dynamic scaling circuit
    8.
    发明授权
    Switch controller having a dynamic scaling circuit 有权

    公开(公告)号：US12191755B2

    公开(公告)日：2025-01-07

    申请号：US18174645

    申请日：2023-02-26

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Robert Allan Neidorff

    IPC: H02M1/08 ,  H03K3/012

    Abstract: A dynamic scaling circuit includes: a damping control circuit; a sampling circuit; and a controller. The damping control circuit has a first input, a second input, a third input, an output, and a ground terminal. The sampling circuit has a first input, a second input, an output, and a ground terminal. The first input of the sampling circuit is coupled to the output of the damping control circuit. The controller has an input, a first output, a second output, and a third output. The first output of the controller is coupled to the second input of the damping control circuit. The second output of the controller is coupled to the third input of the damping control circuit. The third output of the controller is coupled to the second input of the sampling circuit.

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