公开(公告)号：US11018582B2

公开(公告)日：2021-05-25

申请号：US16399793

申请日：2019-04-30

Applicant: Texas Instruments Incorporated

Inventor： Saurav Bandyopadhyay ,  Michael G. Amaro ,  Michael Thomas DiRenzo ,  Thomas Matthew LaBella ,  Robert Allan Neidorff

IPC: H02M3/158 ,  H02M3/157 ,  H03K5/24 ,  H02M1/08 ,  H02M1/00

Abstract: A circuit includes a first transistor and a second transistor coupled to the first transistor at a switch node and to a ground node. An estimator circuit receives a first signal to control an on and off state of the first transistor. The estimator circuit generates a second signal to control the on and off state of the second transistor. The second signal has a pulse width based on a pulse width of the first signal. A clocked comparator includes a clock input, a first input, and a second input. The first input receives a voltage indicative of a voltage of the switch node. The second input is coupled to a ground node. The clock input receives a third signal indicative of the second signal. The clocked comparator generates a comparator output signal. The estimator circuit adjusts the pulse width of the second signal based on the comparator output signal.