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公开(公告)号：US20240274570A1
公开(公告)日：2024-08-15
申请号：US18648632
申请日：2024-04-29
IPC分类号： H01L23/00 , H01L21/48 , H01L21/56 , H01L23/31 , H01L23/495
CPC分类号： H01L24/48 , H01L21/4825 , H01L21/565 , H01L23/3107 , H01L23/49513 , H01L23/4952 , H01L23/49575 , H01L24/85 , H01L2224/48137 , H01L2224/48245 , H01L2224/48465 , H01L2224/48479 , H01L2224/85051 , H01L2224/85205
摘要： An electronic device includes a bond wire with a first end bonded by a ball bond to a planar side of a first conductive plate, and a second end bonded by a stitch bond to a conductive stud bump at an angle greater than or equal to 60 degrees. A wirebonding method includes bonding the first end of the conductive bond wire to the first conductive plate includes forming a ball bond to join the first end of the conductive bond wire to a planar side of the first conductive plate by a ball bond, and bonding the second end of the conductive bond wire to the conductive stud bump includes forming a stitch bond to join the second end of the conductive bond wire to the conductive stud bump.
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公开(公告)号：US20220352111A1
公开(公告)日：2022-11-03
申请号：US17242380
申请日：2021-04-28
IPC分类号： H01L23/00 , H01L23/31 , H01L23/495 , H01L21/48 , H01L21/56
摘要： An electronic device includes a bond wire with a first end bonded by a ball bond to a planar side of a first conductive plate, and a second end bonded by a stitch bond to a conductive stud bump at an angle greater than or equal to 60 degrees. A wirebonding method includes bonding the first end of the conductive bond wire to the first conductive plate includes forming a ball bond to join the first end of the conductive bond wire to a planar side of the first conductive plate by a ball bond, and bonding the second end of the conductive bond wire to the conductive stud bump includes forming a stitch bond to join the second end of the conductive bond wire to the conductive stud bump.
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公开(公告)号：US11973052B2
公开(公告)日：2024-04-30
申请号：US17242380
申请日：2021-04-28
IPC分类号： H01L23/00 , H01L21/48 , H01L21/56 , H01L23/31 , H01L23/495
CPC分类号： H01L24/48 , H01L21/4825 , H01L21/565 , H01L23/3107 , H01L23/49513 , H01L23/4952 , H01L23/49575 , H01L24/85 , H01L2224/48137 , H01L2224/48245 , H01L2224/48465 , H01L2224/48479 , H01L2224/85051 , H01L2224/85205
摘要： An electronic device includes a bond wire with a first end bonded by a ball bond to a planar side of a first conductive plate, and a second end bonded by a stitch bond to a conductive stud bump at an angle greater than or equal to 60 degrees. A wirebonding method includes bonding the first end of the conductive bond wire to the first conductive plate includes forming a ball bond to join the first end of the conductive bond wire to a planar side of the first conductive plate by a ball bond, and bonding the second end of the conductive bond wire to the conductive stud bump includes forming a stitch bond to join the second end of the conductive bond wire to the conductive stud bump.
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公开(公告)号：US11848297B2
公开(公告)日：2023-12-19
申请号：US17364807
申请日：2021-06-30
发明人： Bo-Hsun Pan , Chien-Chang Li , Hung-Yu Chou , Shawn Martin O'Connor , Byron Lovell Williams , Jeffrey Alan West , Zi-Xian Zhan , Sheng-Wen Huang
IPC分类号： H01L23/00 , H01L23/495 , H01L25/065
CPC分类号： H01L24/48 , H01L23/4952 , H01L23/49575 , H01L24/45 , H01L24/85 , H01L25/0655 , H01L2224/45124 , H01L2224/45139 , H01L2224/45147 , H01L2224/45644 , H01L2224/45664 , H01L2224/48138 , H01L2224/48245 , H01L2224/48453 , H01L2224/48463 , H01L2224/48481 , H01L2224/85035 , H01L2224/85051 , H01L2924/182
摘要： In a described example, an apparatus includes: a package substrate having a die mount portion and lead portions spaced from the die mount portion; a semiconductor die over the die mount portion having bond pads on an active surface facing away from the package substrate; non-gold bond wires forming electrical connections between at least one of the bond pads and one of the lead portions of the package substrate; a bond stitch on bump connection formed between one of the non-gold bond wires and a bond pad of the semiconductor die, comprising a stitch bond formed on a flex stud bump; and dielectric material covering a portion of the package substrate, the semiconductor die, the non-gold bond wires, the stitch bond and the flex stud bump, forming a packaged semiconductor device.
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公开(公告)号：US20230005874A1
公开(公告)日：2023-01-05
申请号：US17364807
申请日：2021-06-30
发明人： Bo-Hsun Pan , Chien-Chang Li , Hung-Yu Chou , Shawn Martin O'Connor , Byron Lovell Williams , Jeffrey Alan West , Zi-Xian Zhan , Sheng-Wen Huang
IPC分类号： H01L23/00 , H01L25/065 , H01L23/495
摘要： In a described example, an apparatus includes: a package substrate having a die mount portion and lead portions spaced from the die mount portion; a semiconductor die over the die mount portion having bond pads on an active surface facing away from the package substrate; non-gold bond wires forming electrical connections between at least one of the bond pads and one of the lead portions of the package substrate; a bond stitch on bump connection formed between one of the non-gold bond wires and a bond pad of the semiconductor die, comprising a stitch bond formed on a flex stud bump; and dielectric material covering a portion of the package substrate, the semiconductor die, the non-gold bond wires, the stitch bond and the flex stud bump, forming a packaged semiconductor device.
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