公开(公告)号：US20240147731A1

公开(公告)日：2024-05-02

申请号：US18303131

申请日：2023-04-19

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yi-Hsuan CHEN ,  Kuen-Yi CHEN ,  Yi Ching ONG ,  Kuo-Ching HUANG

IPC: H10B51/30 ,  H01L29/51 ,  H01L29/66 ,  H01L29/78

CPC classification number: H10B51/30 ,  H01L29/516 ,  H01L29/6684 ,  H01L29/78391

Abstract: An interfacial layer is formed in a manner that enables a ferroelectric layer to be formed such that formation of ferroelectric crystalline phases (e.g., orthorhombic crystalline phases) in the ferroelectric layer is increased and formation of non-ferroelectric crystalline phases (e.g., monoclinic phases, tetragonal phases) in the ferroelectric layer is reduced. To achieve this, the grain size and/or other properties of the interfacial layer may be controlled during formation of the interfacial layer such that the grain size and/or other properties of the interfacial layer facilitate formation of a larger grain size in the ferroelectric layer. At larger grain sizes in the ferroelectric layer, the concentration of the ferroelectric crystalline phases in the crystal structure of the ferroelectric layer may be increased relative to if the ferroelectric layer were formed to a smaller grain size.

公开(公告)号：US20230413673A1

公开(公告)日：2023-12-21

申请号：US17807617

申请日：2022-06-17

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Fu-Hai LI ,  Kuen-Yi CHEN ,  Yi Ching ONG ,  Kuo-Ching HUANG ,  Harry Hak Lay CHUANG

IPC: H01L37/02 ,  H01L27/16 ,  H01L41/187

CPC classification number: H01L37/025 ,  H01L27/16 ,  H01L41/1876

Abstract: A pyroelectric generator may be included in the same semiconductor device as a radio frequency (RF) switch (e.g., a phase-change material (PCM) RF switch and/or other types of RF switch). The pyroelectric generator includes a pyroelectric material layer between two electrodes. The pyroelectric generator is configured to scavenge thermal energy that is generated during the operation of the RF switch, and to convert the thermal energy into electrical energy that may be stored and reused.

公开(公告)号：US20240234401A9

公开(公告)日：2024-07-11

申请号：US18302466

申请日：2023-04-18

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chien Hung LIU ,  Yu-Sheng CHEN ,  Yi Ching ONG ,  Hsien Jung CHEN ,  Kuen-Yi CHEN ,  Kuo-Ching HUANG ,  Harry-HakLay CHUANG ,  Wei-Cheng WU ,  Yu-Jen WANG

IPC: H01L25/18 ,  H01L23/00 ,  H01L23/48 ,  H01L23/522

CPC classification number: H01L25/18 ,  H01L23/481 ,  H01L23/5227 ,  H01L24/08 ,  H01L28/40 ,  H01L2224/08145

Abstract: A semiconductor die package includes an inductor-capacitor (LC) semiconductor die that is directly bonded with a logic semiconductor die. The LC semiconductor die includes inductors and capacitors that are integrated into a single die. The inductors and capacitors of the LC semiconductor die may be electrically connected with transistors and other logic components on the logic semiconductor die to form a voltage regulator circuit of the semiconductor die package. The integration of passive components (e.g., the inductors and capacitors) of the voltage regulator circuit into a single semiconductor die reduces signal propagation distances in the voltage regulator circuit, which may increase the operating efficiency of the voltage regulator circuit, may reduce the formfactor for the semiconductor die package, may reduce parasitic capacitance and/or may reduce parasitic inductance in the voltage regulator circuit (thereby improving the performance of the voltage regulator circuit), among other examples.

公开(公告)号：US20240136346A1

公开(公告)日：2024-04-25

申请号：US18302466

申请日：2023-04-17

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chien Hung LIU ,  Yu-Sheng CHEN ,  Yi Ching ONG ,  Hsien Jung CHEN ,  Kuen-Yi CHEN ,  Kuo-Ching HUANG ,  Harry-HakLay CHUANG ,  Wei-Cheng WU ,  Yu-Jen WANG

IPC: H01L25/18 ,  H01L23/00 ,  H01L23/48 ,  H01L23/522

CPC classification number: H01L25/18 ,  H01L23/481 ,  H01L23/5227 ,  H01L24/08 ,  H01L28/40 ,  H01L2224/08145

Abstract: A semiconductor die package includes an inductor-capacitor (LC) semiconductor die that is directly bonded with a logic semiconductor die. The LC semiconductor die includes inductors and capacitors that are integrated into a single die. The inductors and capacitors of the LC semiconductor die may be electrically connected with transistors and other logic components on the logic semiconductor die to form a voltage regulator circuit of the semiconductor die package. The integration of passive components (e.g., the inductors and capacitors) of the voltage regulator circuit into a single semiconductor die reduces signal propagation distances in the voltage regulator circuit, which may increase the operating efficiency of the voltage regulator circuit, may reduce the formfactor for the semiconductor die package, may reduce parasitic capacitance and/or may reduce parasitic inductance in the voltage regulator circuit (thereby improving the performance of the voltage regulator circuit), among other examples.

公开(公告)号：US20230403864A1

公开(公告)日：2023-12-14

申请号：US17840003

申请日：2022-06-14

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wei Ting HSIEH ,  Kuen-Yi CHEN ,  Yi-Hsuan CHEN ,  Yu-Wei TING ,  Yi Ching ONG ,  Kuo-Ching HUANG

IPC: H01L27/11507 ,  G11C11/22

CPC classification number: H01L27/11507 ,  G11C11/221 ,  G11C11/2275

Abstract: A semiconductor device includes a first capacitor having a ferroelectric film disposed between two electrodes, a second capacitor, having another dielectric film disposed between two electrodes. A first voltage is applied across the first capacitor such that the ferroelectric film is polarized, altering the effective resistance through the device. A second voltage is applied across the first capacitor, such that a leakage current transits the ferroelectric film, and accumulates along an electrode of the second capacitor, and the gate of a transistor, thereby effecting a change to the drain to source resistance of the transistor which may be measured to determine the polarization state of the ferroelectric film.