公开(公告)号：US20140138742A1

公开(公告)日：2014-05-22

申请号：US14078141

申请日：2013-11-12

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Clement Hsingjen Wann ,  Chih-Hsin Ko ,  Yao-Tsung Huang ,  Cheng-Ying Huang

IPC: H01L29/78

CPC classification number: H01L29/7848 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/785

Abstract: A device including a silicon substrate, a silicon germanium layer, a silicon layer, a gate stack, and silicon-containing stressors is provided. In an embodiment, the silicon germanium layer is disposed over a silicon substrate and relaxed while the silicon layer is disposed over the silicon germanium layer and un-relaxed. The silicon layer may be free from germanium. The gate stack is of an n-type metal-oxide-semiconductor (NMOS) field-effect transistor (FET) and disposed over the silicon layer and the silicon germanium layer. A portion of the silicon layer forms a channel region of the NMOS FET. The silicon-containing stressors are formed in recesses in the silicon layer and have a lattice constant smaller than a lattice constant of the silicon germanium layer.

Abstract translation: 提供了包括硅衬底，硅锗层，硅层，栅叠层和含硅应力源的器件。 在一个实施例中，硅锗层设置在硅衬底上并且松弛，同时硅层设置在硅锗层上并且不放松。 硅层可以不含锗。 栅极堆叠是n型金属氧化物半导体（NMOS）场效应晶体管（FET）并且设置在硅层和硅锗层之上。 硅层的一部分形成NMOS FET的沟道区。 含硅应力源形成在硅层中的凹陷中，其晶格常数小于硅锗层的晶格常数。

公开(公告)号：US09508849B2

公开(公告)日：2016-11-29

申请号：US14078141

申请日：2013-11-12

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Clement Hsingjen Wann ,  Chih-Hsin Ko ,  Yao-Tsung Huang ,  Cheng-Ying Huang

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/165

CPC classification number: H01L29/7848 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/785

Abstract: A device including a silicon substrate, a silicon germanium layer, a silicon layer, a gate stack, and silicon-containing stressors is provided. In an embodiment, the silicon germanium layer is disposed over a silicon substrate and relaxed while the silicon layer is disposed over the silicon germanium layer and un-relaxed. The silicon layer may be free from germanium. The gate stack is of an n-type metal-oxide-semiconductor (NMOS) field-effect transistor (FET) and disposed over the silicon layer and the silicon germanium layer. A portion of the silicon layer forms a channel region of the NMOS FET. The silicon-containing stressors are formed in recesses in the silicon layer and have a lattice constant smaller than a lattice constant of the silicon germanium layer.

Abstract translation: 提供了包括硅衬底，硅锗层，硅层，栅叠层和含硅应力源的器件。 在一个实施例中，硅锗层设置在硅衬底上并且松弛，同时硅层设置在硅锗层上并且不放松。 硅层可以不含锗。 栅极堆叠是n型金属氧化物半导体（NMOS）场效应晶体管（FET）并且设置在硅层和硅锗层之上。 硅层的一部分形成NMOS FET的沟道区。 含硅应力源形成在硅层中的凹陷中，其晶格常数小于硅锗层的晶格常数。