公开(公告)号：US09698024B2

公开(公告)日：2017-07-04

申请号：US14330092

申请日：2014-07-14

Applicant: Taiwan Semiconductor Manufacturing Co. Ltd.

Inventor： Long-Shih Lin ,  Fu-Hsiung Yang ,  Kun-Ming Huang ,  Ming-Yi Lin ,  Paul Chu

IPC: H01L21/308 ,  H01L29/66 ,  H01L29/78 ,  H01L29/739 ,  G01R31/12 ,  H01L29/08 ,  G01R31/26 ,  H01L21/762

CPC classification number: H01L21/308 ,  G01R31/129 ,  G01R31/2637 ,  H01L21/3083 ,  H01L21/76275 ,  H01L21/76283 ,  H01L29/086 ,  H01L29/66325 ,  H01L29/66689 ,  H01L29/7394 ,  H01L29/7824

Abstract: Some embodiments of the present disclosure relate to a method to increase breakdown voltage of a power device. A power device is formed on a silicon-on-insulator (SOI) wafer made up of a device wafer, a handle wafer, and an intermediate oxide layer. A recess is formed in a lower surface of the handle wafer to define a recessed region of the handle wafer. The recessed region of the handle wafer has a first handle wafer thickness, which is greater than zero. An un-recessed region of the handle wafer has a second handle wafer thickness, which is greater than the first handle wafer thickness. The first handle wafer thickness of the recessed region provides a breakdown voltage improvement for the power device.

公开(公告)号：US20140322871A1

公开(公告)日：2014-10-30

申请号：US14330092

申请日：2014-07-14

Applicant: Taiwan Semiconductor Manufacturing Co. Ltd.

Inventor： Long-Shih Lin ,  Fu-Hsiung Yang ,  Kun-Ming Huang ,  Ming-Yi Lin ,  Paul Chu

IPC: H01L29/66 ,  H01L21/308

CPC classification number: H01L21/308 ,  G01R31/129 ,  G01R31/2637 ,  H01L21/3083 ,  H01L21/76275 ,  H01L21/76283 ,  H01L29/086 ,  H01L29/66325 ,  H01L29/66689 ,  H01L29/7394 ,  H01L29/7824

Abstract: Some embodiments of the present disclosure relate to a method to increase breakdown voltage of a power device. A power device is formed on a silicon-on-insulator (SOI) wafer made up of a device wafer, a handle wafer, and an intermediate oxide layer. A recess is formed in a lower surface of the handle wafer to define a recessed region of the handle wafer. The recessed region of the handle wafer has a first handle wafer thickness, which is greater than zero. An un-recessed region of the handle wafer has a second handle wafer thickness, which is greater than the first handle wafer thickness. The first handle wafer thickness of the recessed region provides a breakdown voltage improvement for the power device.

Abstract translation: 本公开的一些实施例涉及增加功率器件的击穿电压的方法。 功率器件形成在由器件晶片，手柄晶片和中间氧化物层构成的绝缘体上硅（SOI）晶片上。 在处理晶片的下表面上形成凹口，以限定处理晶片的凹陷区域。 处理晶片的凹陷区域具有大于零的第一处理晶片厚度。 处理晶片的未凹陷区域具有大于第一处理晶片厚度的第二处理晶片厚度。 凹陷区域的第一处理晶片厚度为功率器件提供了击穿电压的改善。