公开(公告)号：US11450581B2

公开(公告)日：2022-09-20

申请号：US17162073

申请日：2021-01-29

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Teng-Yuan Lo ,  Lipu Kris Chuang ,  Hsin-Yu Pan

IPC分类号： H01L23/24 ,  H01L25/00 ,  H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L25/10 ,  H01L21/48 ,  H01L21/56

摘要： A package structure and a method of forming the same are provided. A method includes forming first electrical connectors and second electrical connectors on a first side of an interposer wafer. An integrated circuit die is bonded to the first side of the interposer wafer using the first electrical connectors. A stiffener structure is attached to the first side of the interposer wafer adjacent the integrated circuit die. The stiffener structure covers the second electrical connectors in a plan view. The integrated circuit die and the stiffener structure are encapsulated with a first encapsulant. The interposer wafer and the stiffener structure are singulated to form a stacked structure.

公开(公告)号：US10734328B2

公开(公告)日：2020-08-04

申请号：US16714793

申请日：2019-12-16

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Po-Yuan Teng ,  Hao-Yi Tsai ,  Tin-Hao Kuo ,  Ching-Yao Lin ,  Teng-Yuan Lo ,  Chih Wang

IPC分类号： H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/00 ,  H01L25/11

摘要： A semiconductor package includes a first redistribution structure, a semiconductor die disposed on the first redistribution structure, a die attach material disposed between the first redistribution structure and the semiconductor die, and an insulating encapsulant disposed on the first redistribution structure. A first shortest distance from a midpoint of a bottom edge of the semiconductor die to a midpoint of an bottom edge of an extruded region of the die attach material in a width direction of the semiconductor die is greater than a second shortest distance between an endpoint of the bottom edge of the semiconductor die to an endpoint of the bottom edge of the extruded region of the die attach material. The insulating encapsulant encapsulates the semiconductor die and the die attach material. An inclined interface is between the insulating encapsulant and the extruded region of the die attach material.

公开(公告)号：US10985115B2

公开(公告)日：2021-04-20

申请号：US16905928

申请日：2020-06-19

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Po-Yuan Teng ,  Hao-Yi Tsai ,  Tin-Hao Kuo ,  Ching-Yao Lin ,  Teng-Yuan Lo ,  Chih Wang

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L25/11

摘要： A semiconductor package includes a first redistribution structure, a semiconductor die electrically coupled to the first redistribution structure, a die attach material interposed between the first redistribution structure and the semiconductor die, and an insulating encapsulant disposed on the first redistribution structure and covering the semiconductor die and the die attach material. A bottom of the semiconductor die is embedded in the die attach material, and a thickness of a portion of the die attach material disposed over a spacing of conductive traces of the first redistribution structure is greater than a thickness of another portion of the die attach material disposed over the conductive traces of the first redistribution structure and underlying the bottom of the semiconductor die.

公开(公告)号：US20200091091A1

公开(公告)日：2020-03-19

申请号：US16691518

申请日：2019-11-21

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Po-Yuan Teng ,  Hao-Yi Tsai ,  Tin-Hao Kuo ,  Ching-Yao Lin ,  Teng-Yuan Lo ,  Chih Wang

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L25/11

摘要： A manufacturing method of a semiconductor package includes at least the following steps. A dielectric layer is formed on a conductive pattern and in a space between the conductive pattern, where a concave area of the dielectric layer is formed corresponding to the space between the conductive pattern. A semiconductor die is disposed on the concave area of the dielectric layer with a die attach material interposed therebetween. A pressure is applied to the die attach material so that the concave area of the dielectric layer is filled with the die attach material, and a portion of the die attach material is extruded from the concave area to expand wider than an area of the semiconductor die. An insulating encapsulant is formed on the dielectric layer to cover the semiconductor die. Other methods for forming a semiconductor package are also provided.

公开(公告)号：US20190333869A1

公开(公告)日：2019-10-31

申请号：US15964087

申请日：2018-04-27

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Po-Yuan Teng ,  Hao-Yi Tsai ,  Tin-Hao Kuo ,  Ching-Yao Lin ,  Teng-Yuan Lo ,  Chih Wang

IPC分类号： H01L23/00 ,  H01L25/11 ,  H01L25/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

摘要： A semiconductor package and a manufacturing method thereof are provided with the following steps, attaching a rear surface of a semiconductor die on a first redistribution structure by a die attach material, wherein the semiconductor die is pressed so that the die attach material is extruded laterally out and climbs upwardly to cover a sidewall of the semiconductor die, and after attaching, the die attach material comprises an extruded region surrounding the semiconductor die, a first shortest distance from a midpoint of an bottom edge of semiconductor die to a midpoint of an bottom edge of extruded region in a width direction is greater than a second shortest distance between an endpoint of the bottom edge of semiconductor die to an endpoint of the bottom edge of extruded region; and forming an insulating encapsulant on the first redistribution structure to encapsulate the semiconductor die and the die attach material.

公开(公告)号：US11984372B2

公开(公告)日：2024-05-14

申请号：US17875656

申请日：2022-07-28

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Teng-Yuan Lo ,  Lipu Kris Chuang ,  Hsin-Yu Pan

IPC分类号： H01L23/24 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/00 ,  H01L25/065 ,  H01L25/10

CPC分类号： H01L23/24 ,  H01L21/4846 ,  H01L21/561 ,  H01L23/3135 ,  H01L23/3185 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/81815 ,  H01L2225/1035 ,  H01L2225/1058

摘要： A package structure and a method of forming the same are provided. A method includes forming first electrical connectors and second electrical connectors on a first side of an interposer wafer. An integrated circuit die is bonded to the first side of the interposer wafer using the first electrical connectors. A stiffener structure is attached to the first side of the interposer wafer adjacent the integrated circuit die. The stiffener structure covers the second electrical connectors in a plan view. The integrated circuit die and the stiffener structure are encapsulated with a first encapsulant. The interposer wafer and the stiffener structure are singulated to form a stacked structure.

公开(公告)号：US20220068736A1

公开(公告)日：2022-03-03

申请号：US17162073

申请日：2021-01-29

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Teng-Yuan Lo ,  Lipu Kris Chuang ,  Hsin-Yu Pan

IPC分类号： H01L23/24 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L25/10 ,  H01L21/48

摘要： A package structure and a method of forming the same are provided. A method includes forming first electrical connectors and second electrical connectors on a first side of an interposer wafer. An integrated circuit die is bonded to the first side of the interposer wafer using the first electrical connectors. A stiffener structure is attached to the first side of the interposer wafer adjacent the integrated circuit die. The stiffener structure covers the second electrical connectors in a plan view. The integrated circuit die and the stiffener structure are encapsulated with a first encapsulant. The interposer wafer and the stiffener structure are singulated to form a stacked structure.

公开(公告)号：US10510686B2

公开(公告)日：2019-12-17

申请号：US15964087

申请日：2018-04-27

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Po-Yuan Teng ,  Hao-Yi Tsai ,  Tin-Hao Kuo ,  Ching-Yao Lin ,  Teng-Yuan Lo ,  Chih Wang

IPC分类号： H01L21/48 ,  H01L21/56 ,  H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L25/00 ,  H01L25/11

摘要： A semiconductor package and a manufacturing method thereof are provided with the following steps, attaching a rear surface of a semiconductor die on a first redistribution structure by a die attach material, wherein the semiconductor die is pressed so that the die attach material is extruded laterally out and climbs upwardly to cover a sidewall of the semiconductor die, and after attaching, the die attach material comprises an extruded region surrounding the semiconductor die, a first shortest distance from a midpoint of an bottom edge of semiconductor die to a midpoint of an bottom edge of extruded region in a width direction is greater than a second shortest distance between an endpoint of the bottom edge of semiconductor die to an endpoint of the bottom edge of extruded region; and forming an insulating encapsulant on the first redistribution structure to encapsulate the semiconductor die and the die attach material.

公开(公告)号：US10461023B2

公开(公告)日：2019-10-29

申请号：US15884357

申请日：2018-01-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Mao-Yen Chang ,  Hao-Yi Tsai ,  Kuo-Lung Pan ,  Tin-Hao Kuo ,  Tzung-Hui Lee ,  Teng-Yuan Lo ,  Hao-Chun Ting

IPC分类号： H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L25/10

摘要： Semiconductor package s and methods of forming the same are disclosed. The semiconductor package includes a chip, a redistribution circuit structure and a UBM pattern. The redistribution circuit structure is disposed over and electrically connected to the chip and includes a topmost conductive pattern. The UBM pattern is disposed over and electrically connected to the topmost conductive pattern, wherein the UBM pattern includes a set of vias and a pad on the set of vias, wherein the vias are arranged in an array and electrically connected to the pad and the topmost conductive pattern.

公开(公告)号：US20240274483A1

公开(公告)日：2024-08-15

申请号：US18630049

申请日：2024-04-09

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Teng-Yuan Lo ,  Lipu Kris Chuang ,  Hsin-Yu Pan

IPC分类号： H01L23/24 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/00 ,  H01L25/065 ,  H01L25/10

CPC分类号： H01L23/24 ,  H01L21/4846 ,  H01L21/561 ,  H01L23/3135 ,  H01L23/3185 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/81815 ,  H01L2225/1035 ,  H01L2225/1058

摘要： A package structure and a method of forming the same are provided. A method includes forming first electrical connectors and second electrical connectors on a first side of an interposer wafer. An integrated circuit die is bonded to the first side of the interposer wafer using the first electrical connectors. A stiffener structure is attached to the first side of the interposer wafer adjacent the integrated circuit die. The stiffener structure covers the second electrical connectors in a plan view. The integrated circuit die and the stiffener structure are encapsulated with a first encapsulant. The interposer wafer and the stiffener structure are singulated to form a stacked structure.