公开(公告)号：US20160141404A1

公开(公告)日：2016-05-19

申请号：US14540250

申请日：2014-11-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Wei Tsai ,  King-Yuen Wong ,  Han-Chin Chiu ,  Sheng-de Liu

IPC: H01L29/778 ,  H01L29/66 ,  H01L29/20

CPC classification number: H01L29/7787 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/66462

Abstract: A high-electron mobility transistor (HEMT) device employing a gate protection layer is provided. A substrate has a channel layer arranged over the substrate and has a barrier layer arranged over the channel layer. The channel and barrier layers define a heterojunction, and a gate structure is arranged over a gate region of the barrier layer. The gate structure includes a gate arranged over a cap, where the cap is disposed on the barrier layer. The gate protection layer is arranged along sidewalls of the cap and arranged below the gate between opposing surfaces of the gate and the cap. Advantageously, the gate protection layer passivates the gate, reduces leakage current along sidewalls of the cap, and improves device reliability and threshold voltage uniformity. A method for manufacturing the HEMT device is also provided.

Abstract translation: 提供了采用栅极保护层的高电子迁移率晶体管（HEMT）器件。 衬底具有布置在衬底上的沟道层，并且具有布置在沟道层上的势垒层。 通道和阻挡层限定了异质结，并且栅极结构被布置在阻挡层的栅极区域的上方。 栅极结构包括布置在盖上的栅极，其中盖设置在阻挡层上。 栅极保护层沿着盖的侧壁布置并且布置在栅极的相对表面和栅极之下的栅极下方。 有利地，栅极保护层钝化栅极，减少沿着盖的侧壁的泄漏电流，并且提高器件可靠性和阈值电压均匀性。 还提供了一种用于制造HEMT装置的方法。

公开(公告)号：US09601608B2

公开(公告)日：2017-03-21

申请号：US14540250

申请日：2014-11-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Wei Tsai ,  King-Yuen Wong ,  Han-Chin Chiu ,  Sheng-de Liu

IPC: H01L29/66 ,  H01L29/778 ,  H01L29/20 ,  H01L29/417 ,  H01L29/10

CPC classification number: H01L29/7787 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/66462

Abstract: A high-electron mobility transistor (HEMT) device employing a gate protection layer is provided. A substrate has a channel layer arranged over the substrate and has a barrier layer arranged over the channel layer. The channel and barrier layers define a heterojunction, and a gate structure is arranged over a gate region of the barrier layer. The gate structure includes a gate arranged over a cap, where the cap is disposed on the barrier layer. The gate protection layer is arranged along sidewalls of the cap and arranged below the gate between opposing surfaces of the gate and the cap. Advantageously, the gate protection layer passivates the gate, reduces leakage current along sidewalls of the cap, and improves device reliability and threshold voltage uniformity. A method for manufacturing the HEMT device is also provided.