公开(公告)号：US20210376053A1

公开(公告)日：2021-12-02

申请号：US16884319

申请日：2020-05-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hung-Wen Hsu ,  Po-Han Huang ,  Wei-Li Huang

IPC: H01L49/02 ,  H01F27/36 ,  H01F27/02 ,  H01F27/06 ,  H01F41/10 ,  H01F41/02

Abstract: The present disclosure relates to, in part, an inductor structure that includes an etch stop layer arranged over an interconnect structure overlying a substrate. A magnetic structure includes a plurality of stacked layers is arranged over the etch stop layer. The magnetic structure includes a bottommost layer that is wider than a topmost layer. A first conductive wire and a second conductive wire extend in parallel over the magnetic structure. The magnetic structure is configured to modify magnetic fields generated by the first and second conductive wires. A pattern enhancement layer is arranged between the bottommost layer of the magnetic structure and the etch stop layer. The pattern enhancement layer has a first thickness, and the bottommost layer of the magnetic structure has a second thickness that is less than the first thickness.

公开(公告)号：US20210119064A1

公开(公告)日：2021-04-22

申请号：US17134782

申请日：2020-12-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Han Huang ,  Chien Nan Tu ,  Chi-Yuan Wen ,  Ming-Chi Wu ,  Yu-Lung Yeh ,  Hsin-Yi Kuo

IPC: H01L31/0232 ,  H01L27/146 ,  H01L27/30 ,  H01L31/02 ,  H01L31/0224

Abstract: The present disclosure relates to an integrated chip that has a light sensing element arranged within a substrate. An absorption enhancement structure is arranged along a back-side of the substrate, and an interconnect structure is arranged along a front-side of the substrate. A reflection structure includes a dielectric structure and a plurality of semiconductor pillars that matingly engage the dielectric structure. The dielectric structure and semiconductor pillars are arranged along the front-side of the substrate and are spaced between the light sensing element and the interconnect structure. The plurality of semiconductor pillars and the dielectric structure are collectively configured to reflect incident light that has passed through the absorption enhancement structure and through the light sensing element back towards the light sensing element before the incident light strikes the interconnect structure.

公开(公告)号：US10707361B2

公开(公告)日：2020-07-07

申请号：US16580350

申请日：2019-09-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Han Huang ,  Chien Nan Tu ,  Chi-Yuan Wen ,  Ming-Chi Wu ,  Yu-Lung Yeh ,  Hsin-Yi Kuo

IPC: H01L31/0232 ,  H01L27/146 ,  H01L27/30 ,  H01L31/02 ,  H01L31/0224

Abstract: The present disclosure relates to an integrated chip that has a light sensing element arranged within a substrate. An absorption enhancement structure is arranged along a back-side of the substrate, and an interconnect structure is arranged along a front-side of the substrate. A reflection structure includes a dielectric structure and a plurality of semiconductor pillars that matingly engage the dielectric structure. The dielectric structure and semiconductor pillars are arranged along the front-side of the substrate and are spaced between the light sensing element and the interconnect structure. The plurality of semiconductor pillars and the dielectric structure are collectively configured to reflect incident light that has passed through the absorption enhancement structure and through the light sensing element back towards the light sensing element before the incident light strikes the interconnect structure.

公开(公告)号：US20200020816A1

公开(公告)日：2020-01-16

申请号：US16580350

申请日：2019-09-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Han Huang ,  Chien Nan Tu ,  Chi-Yuan Wen ,  Ming-Chi Wu ,  Yu-Lung Yeh ,  Hsin-Yi Kuo

IPC: H01L31/0232 ,  H01L31/0224 ,  H01L31/02 ,  H01L27/30

Abstract: The present disclosure relates to an integrated chip that has a light sensing element arranged within a substrate. An absorption enhancement structure is arranged along a back-side of the substrate, and an interconnect structure is arranged along a front-side of the substrate. A reflection structure includes a dielectric structure and a plurality of semiconductor pillars that matingly engage the dielectric structure. The dielectric structure and semiconductor pillars are arranged along the front-side of the substrate and are spaced between the light sensing element and the interconnect structure. The plurality of semiconductor pillars and the dielectric structure are collectively configured to reflect incident light that has passed through the absorption enhancement structure and through the light sensing element back towards the light sensing element before the incident light strikes the interconnect structure.

公开(公告)号：US11251213B2

公开(公告)日：2022-02-15

申请号：US17063801

申请日：2020-10-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Han Huang ,  Jiech-Fun Lu ,  Yu-Chun Chen

IPC: H01L27/146

Abstract: In some embodiments, the present disclosure relates to an integrated chip having an inter-layer dielectric (ILD) structure along a first surface of a substrate having a photodetector. An etch stop layer is over the ILD structure, and a reflector is surrounded by the etch stop layer and the ILD structure. The reflector has a curved surface facing the substrate at a location directly over the photodetector. The curved surface is coupled between a first sidewall and a second sidewall of the reflector. The reflector has larger thicknesses along the first sidewall and the second sidewall than at a center of the reflector between the first sidewall and the second sidewall.

公开(公告)号：US20180151759A1

公开(公告)日：2018-05-31

申请号：US15716714

申请日：2017-09-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Han Huang ,  Chien Nan Tu ,  Chi-Yuan Wen ,  Ming-Chi Wu ,  Yu-Lung Yeh ,  Hsin-Yi Kuo

IPC: H01L31/0232 ,  H01L27/30 ,  H01L31/0224 ,  H01L31/02

CPC classification number: H01L31/0232 ,  H01L27/14603 ,  H01L27/14612 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14629 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14685 ,  H01L27/307 ,  H01L31/02002 ,  H01L31/0224

Abstract: The present disclosure relates to an integrated chip that has a light sensing element arranged within a substrate. An absorption enhancement structure is arranged along a back-side of the substrate, and an interconnect structure is arranged along a front-side of the substrate. A reflection structure includes a dielectric structure and a plurality of semiconductor pillars that matingly engage the dielectric structure. The dielectric structure and semiconductor pillars are arranged along the front-side of the substrate and are spaced between the light sensing element and the interconnect structure. The plurality of semiconductor pillars and the dielectric structure are collectively configured to reflect incident light that has passed through the absorption enhancement structure and through the light sensing element back towards the light sensing element before the incident light strikes the interconnect structure.

公开(公告)号：US20190057994A1

公开(公告)日：2019-02-21

申请号：US15935341

申请日：2018-03-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Han Huang ,  Jiech-Fun Lu ,  Yu-Chun Chen

IPC: H01L27/146

Abstract: In some embodiments, the present disclosure relates to an integrated chip having an inter-layer dielectric (ILD) structure along a first surface of a substrate having a photodetector. An etch stop layer is over the ILD structure, and a reflector is surrounded by the etch stop layer and the ILD structure. The reflector has a curved surface facing the substrate at a location directly over the photodetector. The curved surface is coupled between a first sidewall and a second sidewall of the reflector. The reflector has larger thicknesses along the first sidewall and the second sidewall than at a center of the reflector between the first sidewall and the second sidewall.

公开(公告)号：US20210036043A1

公开(公告)日：2021-02-04

申请号：US17063801

申请日：2020-10-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Han Huang ,  Jiech-Fun Lu ,  Yu-Chun Chen

IPC: H01L27/146

Abstract: In some embodiments, the present disclosure relates to an integrated chip having an inter-layer dielectric (ILD) structure along a first surface of a substrate having a photodetector. An etch stop layer is over the ILD structure, and a reflector is surrounded by the etch stop layer and the ILD structure. The reflector has a curved surface facing the substrate at a location directly over the photodetector. The curved surface is coupled between a first sidewall and a second sidewall of the reflector. The reflector has larger thicknesses along the first sidewall and the second sidewall than at a center of the reflector between the first sidewall and the second sidewall.

公开(公告)号：US10553733B2

公开(公告)日：2020-02-04

申请号：US15716714

申请日：2017-09-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Han Huang ,  Chien Nan Tu ,  Chi-Yuan Wen ,  Ming-Chi Wu ,  Yu-Lung Yeh ,  Hsin-Yi Kuo

IPC: H01L31/0232 ,  H01L27/146 ,  H01L27/30 ,  H01L31/02 ,  H01L31/0224

Abstract: The present disclosure relates to an integrated chip that has a light sensing element arranged within a substrate. An absorption enhancement structure is arranged along a back-side of the substrate, and an interconnect structure is arranged along a front-side of the substrate. A reflection structure includes a dielectric structure and a plurality of semiconductor pillars that matingly engage the dielectric structure. The dielectric structure and semiconductor pillars are arranged along the front-side of the substrate and are spaced between the light sensing element and the interconnect structure. The plurality of semiconductor pillars and the dielectric structure are collectively configured to reflect incident light that has passed through the absorption enhancement structure and through the light sensing element back towards the light sensing element before the incident light strikes the interconnect structure.

公开(公告)号：US11784211B2

公开(公告)日：2023-10-10

申请号：US16884319

申请日：2020-05-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hung-Wen Hsu ,  Po-Han Huang ,  Wei-Li Huang

IPC: H01F7/06 ,  H01L49/02 ,  H01F27/02 ,  H01F27/06 ,  H01F27/36 ,  H01F41/02 ,  H01F41/10

CPC classification number: H01L28/10 ,  H01F27/027 ,  H01F27/06 ,  H01F27/36 ,  H01F41/0206 ,  H01F41/10

Abstract: The present disclosure relates to, in part, an inductor structure that includes an etch stop layer arranged over an interconnect structure overlying a substrate. A magnetic structure includes a plurality of stacked layers is arranged over the etch stop layer. The magnetic structure includes a bottommost layer that is wider than a topmost layer. A first conductive wire and a second conductive wire extend in parallel over the magnetic structure. The magnetic structure is configured to modify magnetic fields generated by the first and second conductive wires. A pattern enhancement layer is arranged between the bottommost layer of the magnetic structure and the etch stop layer. The pattern enhancement layer has a first thickness, and the bottommost layer of the magnetic structure has a second thickness that is less than the first thickness.