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公开(公告)号：US11018218B2
公开(公告)日：2021-05-25
申请号：US16583133
申请日：2019-09-25
发明人： Kuei-Sung Chang , Te-Hao Lee
摘要： The present disclosure, in some embodiments, relates to a method of semiconductor processing. The method may be performed by etching a substrate to define a trench within the substrate. A sacrificial material is formed within the trench. The sacrificial material has an exposed upper surface. A plurality of discontinuous openings are formed to expose separate segments of a sidewall of the sacrificial material. The plurality of discontinuous openings are separated by non-zero distances along a length of the trench. An etching process is performed to simultaneously etch the exposed upper surface and the sidewall of the sacrificial material.
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公开(公告)号：US10850976B2
公开(公告)日：2020-12-01
申请号：US16515325
申请日：2019-07-18
发明人： Kuei-Sung Chang , Chia-Hua Chu , Shang-Ying Tsai
摘要： Various embodiments of the present disclosure are directed towards a method for forming an integrated chip including an epitaxial layer overlying a microelectromechanical systems (MEMS) substrate. The method includes bonding a MEMS substrate to a carrier substrate, the MEMS substrate includes monocrystalline silicon. An epitaxial layer is formed over the MEMS substrate, the epitaxial layer has a higher doping concentration than the MEMS substrate. A plurality of contacts are formed over the epitaxial layer, the plurality of contacts respectively form ohmic contacts with the epitaxial layer.
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公开(公告)号：US20200346919A1
公开(公告)日：2020-11-05
申请号：US16934236
申请日：2020-07-21
发明人： Kuei-Sung Chang , Fei-Lung Lai , Shang-Ying Tsai , Cheng Yu Hsieh
摘要： The present disclosure relates to a microelectromechanical systems (MEMS) apparatus. The MEMS apparatus includes a base substrate and a conductive routing layer disposed over the base substrate. A bump feature is disposed directly over the conductive routing layer. Opposing outermost sidewalls of the bump feature are laterally between outermost sidewalls of the conductive routing layer. A MEMS substrate is bonded to the base substrate and includes a MEMS device directly over the bump feature. An anti-stiction layer is arranged on one or more of the bump feature and the MEMS device.
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公开(公告)号：US20200095119A1
公开(公告)日：2020-03-26
申请号：US16515325
申请日：2019-07-18
发明人： Kuei-Sung Chang , Chia-Hua Chu , Shang-Ying Tsai
摘要： Various embodiments of the present disclosure are directed towards a method for forming an integrated chip including an epitaxial layer overlying a microelectromechanical systems (MEMS) substrate. The method includes bonding a MEMS substrate to a carrier substrate, the MEMS substrate includes monocrystalline silicon. An epitaxial layer is formed over the MEMS substrate, the epitaxial layer has a higher doping concentration than the MEMS substrate. A plurality of contacts are formed over the epitaxial layer, the plurality of contacts respectively form ohmic contacts with the epitaxial layer.
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公开(公告)号：US09403673B2
公开(公告)日：2016-08-02
申请号：US14880375
申请日：2015-10-12
发明人： Yu-Chia Liu , Chia-Hua Chu , Kuei-Sung Chang , Chun-Wen Cheng
CPC分类号： B81B7/007 , B81B2203/0163 , B81B2203/0307 , B81B2203/04 , B81C1/00166 , B81C1/00301 , B81C1/00801 , B81C2203/0118
摘要： A semiconductor structure for a microelectromechanical systems (MEMS) device is provided. A first substrate region includes an electrical isolation layer arranged over a top surface of the first substrate region. A second substrate region is arranged over the electrical isolation layer and includes a MEMS device structure arranged within the second substrate region. The MEMS device structure includes a fixed mass and a proof mass. A dielectric region is arranged over the electrical isolation layer around the fixed mass. A fixed mass electrode is arranged around the dielectric region, and extends through the second substrate region to the electrical isolation layer. An isolated electrode extends through the second substrate region and the electrical isolation layer to the first substrate region on an opposite side of the proof mass as the fixed mass electrode. The method of forming the semiconductor structure is also provided.
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6.发明申请METHOD FOR MANUFACTURING A MICROELECTROMECHANICAL SYSTEMS (MEMS) DEVICE WITH DIFFERENT ELECTRICAL POTENTIALS AND AN ETCH STOP 有权用于制造具有不同电位和延迟的微电子系统（MEMS）器件的方法公开(公告)号：US20160031703A1
公开(公告)日：2016-02-04
申请号：US14880375
申请日：2015-10-12
发明人： Yu-Chia Liu , Chia-Hua Chu , Kuei-Sung Chang , Chun-Wen Cheng
CPC分类号： B81B7/007 , B81B2203/0163 , B81B2203/0307 , B81B2203/04 , B81C1/00166 , B81C1/00301 , B81C1/00801 , B81C2203/0118
摘要： A semiconductor structure for a microelectromechanical systems (MEMS) device is provided. A first substrate region includes an electrical isolation layer arranged over a top surface of the first substrate region. A second substrate region is arranged over the electrical isolation layer and includes a MEMS device structure arranged within the second substrate region. The MEMS device structure includes a fixed mass and a proof mass. A dielectric region is arranged over the electrical isolation layer around the fixed mass. A fixed mass electrode is arranged around the dielectric region, and extends through the second substrate region to the electrical isolation layer. An isolated electrode extends through the second substrate region and the electrical isolation layer to the first substrate region on an opposite side of the proof mass as the fixed mass electrode. The method of forming the semiconductor structure is also provided.
摘要翻译： 提供了一种用于微机电系统（MEMS）装置的半导体结构。 第一衬底区域包括布置在第一衬底区域的顶表面上方的电隔离层。 第二衬底区域布置在电隔离层上方并且包括布置在第二衬底区域内的MEMS器件结构。 MEMS器件结构包括固定质量和检验质量。 电介质区域布置在固定质量块周围的电隔离层的上方。 固定质量电极布置在电介质区周围，并且延伸穿过第二衬底区域到电隔离层。 隔离电极通过第二衬底区域和电隔离层延伸到与固定质量电极相反的一侧的第一衬底区域。 还提供了形成半导体结构的方法。
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7.发明授权Method for manufacturing a microelectromechanical systems (MEMS) device with different electrical potentials and an etch stop 有权用于制造具有不同电位和蚀刻停止的微机电系统（MEMS）器件的方法公开(公告)号：US09221674B1
公开(公告)日：2015-12-29
申请号：US14450505
申请日：2014-08-04
发明人： Yu-Chia Liu , Chia-Hua Chu , Kuei-Sung Chang , Chun-Wen Cheng
CPC分类号： B81B7/007 , B81B2203/0163 , B81B2203/0307 , B81B2203/04 , B81C1/00166 , B81C1/00301 , B81C1/00801 , B81C2203/0118
摘要： A semiconductor structure for a microelectromechanical systems (MEMS) device is provided. A first substrate region includes an electrical isolation layer arranged over a top surface of the first substrate region. A second substrate region is arranged over the electrical isolation layer and includes a MEMS device structure arranged within the second substrate region. The MEMS device structure includes a fixed mass and a proof mass. A dielectric region is arranged over the electrical isolation layer around the fixed mass. A fixed mass electrode is arranged around the dielectric region, and extends through the second substrate region to the electrical isolation layer. An isolated electrode extends through the second substrate region and the electrical isolation layer to the first substrate region on an opposite side of the proof mass as the fixed mass electrode. The method of forming the semiconductor structure is also provided.
摘要翻译： 提供了一种用于微机电系统（MEMS）装置的半导体结构。 第一衬底区域包括布置在第一衬底区域的顶表面上方的电隔离层。 第二衬底区域布置在电隔离层上方并且包括布置在第二衬底区域内的MEMS器件结构。 MEMS器件结构包括固定质量和检验质量。 电介质区域布置在固定质量块周围的电隔离层的上方。 固定质量电极布置在电介质区周围，并且延伸穿过第二衬底区域到电隔离层。 隔离电极通过第二衬底区域和电隔离层延伸到与固定质量电极相反的一侧的第一衬底区域。 还提供了形成半导体结构的方法。
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公开(公告)号：US20150232326A1
公开(公告)日：2015-08-20
申请号：US14698985
申请日：2015-04-29
发明人： Kuei-Sung Chang
CPC分类号： B81B7/0041 , B81B7/02 , B81B2201/0235 , B81C1/00269 , B81C1/00333 , B81C2203/0109 , B81C2203/0145
摘要： The present disclosure relates to a MEMs substrate. In some embodiments, the MEMs substrate has a device substrate having a micro-electromechanical system (MEMs) device, and a layer of bonding material positioned over the device substrate at positions adjacent to the MEMs device. A cap substrate has a depression is disposed within a surface abutting the layer of bonding material. The depression within the cap substrate forms a chamber vertically disposed between the device substrate and the cap substrate and abutting the MEMs device. One or more pressure tuning channels are vertically disposed between the device substrate and the cap substrate and laterally extend outward from a sidewall of the chamber.
摘要翻译： 本公开涉及一种MEM衬底。 在一些实施例中，MEM衬底具有具有微机电系统（MEMs）器件的器件衬底和位于与器件衬底相邻的位置上的接合材料层。 盖基板具有凹陷部，设置在与接合材料层邻接的表面内。 盖衬底内的凹陷形成垂直设置在器件衬底和帽衬底之间并邻接MEMs器件的腔室。 一个或多个压力调节通道垂直地设置在设备基板和盖基板之间，并且从室的侧壁向外侧向延伸。
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公开(公告)号：US20140374885A1
公开(公告)日：2014-12-25
申请号：US13921273
申请日：2013-06-19
发明人： Kuei-Sung Chang , Te-Hao Lee
IPC分类号： H01L21/306 , H01L29/06 , H01L21/762
CPC分类号： H01L29/06 , B81B2203/033 , B81C1/00619 , H01L21/7813
摘要： The present disclosure relates to a method of etching a narrow gap using one or more parallel releasing structures to improve etching performance, and an associated apparatus. In some embodiments, the method provides a semiconductor substrate with a narrow gap having a sacrificial material. One or more parallel releasing structures are formed within the semiconductor substrate at positions that abut the narrow gap. An etching process is then performed to simultaneously remove the sacrificial material from the narrow gap along a first direction from the one or more parallel releasing structures and along a second direction, perpendicular to the first direction. By simultaneously etching the sacrificial material from both the direction of the narrow gap and from the direction of the one or more parallel releasing structures, the sacrificial material is removed in less time, since the etch is not limited by a size of the narrow gap.
摘要翻译： 本公开涉及使用一个或多个平行释放结构蚀刻窄间隙以改善蚀刻性能的方法，以及相关联的装置。 在一些实施例中，该方法提供了具有牺牲材料的窄间隙的半导体衬底。 在邻接窄间隙的位置处，在半导体衬底内形成一个或多个平行释放结构。 然后进行蚀刻工艺，以从第一方向从窄间隙同时从一个或多个平行释放结构移除牺牲材料，并且沿垂直于第一方向的第二方向移除牺牲材料。 通过从窄间隙的方向和从一个或多个平行释放结构的方向同时蚀刻牺牲材料，牺牲材料在更短的时间内被去除，因为蚀刻不受狭窄间隙的尺寸限制。
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公开(公告)号：US11530130B2
公开(公告)日：2022-12-20
申请号：US16950169
申请日：2020-11-17
发明人： Kuei-Sung Chang , Chia-Hua Chu , Shang-Ying Tsai
摘要： Various embodiments of the present disclosure are directed towards a method for forming a microelectromechanical systems (MEMS) structure including an epitaxial layer overlying a MEMS substrate. The method includes bonding a MEMS substrate to a carrier substrate. The epitaxial layer is formed over the MEMS substrate, where the epitaxial layer has a higher doping concentration than the MEMS substrate. A plurality of contacts is formed over the epitaxial layer.
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