公开(公告)号：US20150235823A1

公开(公告)日：2015-08-20

申请号：US14183670

申请日：2014-02-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chien CHI ,  Shing-Chyang PAN ,  Kuan-Chia CHEN ,  Yao-Jen CHANG ,  Huang-Yi HUANG ,  Ching-Hua HSIEH

IPC: H01J37/34 ,  C23C14/35 ,  C23C14/50 ,  H01L21/285 ,  C23C14/24 ,  C23C14/54

CPC classification number: C23C14/35 ,  C23C14/3492 ,  C23C14/542 ,  H01J37/3405 ,  H01J37/3452 ,  H01J37/3455 ,  H01J37/3458

Abstract: Embodiments of a plasma apparatus are provided. The plasma apparatus includes a processing chamber and a wafer chuck disposed in the processing chamber. The plasma apparatus also includes a target element located over the wafer chuck and an electromagnet array located over the target element and having a number of electromagnets. Some of the electromagnets in a magnetic-field zone of the electromagnet array are enabled to generate a magnetic field adjacent to the target element. The magnetic-field zone is moved during a semiconductor manufacturing process.

Abstract translation: 提供了等离子体装置的实施例。 等离子体装置包括设置在处理室中的处理室和晶片卡盘。 等离子体装置还包括位于晶片卡盘上方的目标元件和位于目标元件上方并具有多个电磁体的电磁体阵列。 电磁体阵列的磁场区域中的一些电磁体能够产生与目标元件相邻的磁场。 磁场区在半导体制造过程中移动。

公开(公告)号：US20150206791A1

公开(公告)日：2015-07-23

申请号：US14161247

申请日：2014-01-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Feng LIN ,  Kuan-Chia CHEN ,  Ching-Hua HSIEH

IPC: H01L21/768

CPC classification number: H01L21/76802 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76882

Abstract: In accordance with some embodiments, a method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer on a semiconductor substrate. The dielectric layer has at least one first trench in the dielectric layer. The method also includes forming a seed layer on a sidewall and a bottom surface of the first trench. The method further includes forming a first conductive layer on the seed layer. The method includes performing a thermal treatment process to melt and transform the seed layer and the first conductive layer into a second conductive layer. The method also includes forming a third conductive layer on the second conductive layer to fill the first trench.

Abstract translation: 根据一些实施例，提供了一种用于形成半导体器件结构的方法。 该方法包括在半导体衬底上形成电介质层。 电介质层在电介质层中具有至少一个第一沟槽。 该方法还包括在第一沟槽的侧壁和底表面上形成种子层。 该方法还包括在种子层上形成第一导电层。 该方法包括执行热处理工艺以将种子层和第一导电层熔化并变换为第二导电层。 该方法还包括在第二导电层上形成第三导电层以填充第一沟槽。

公开(公告)号：US20190164825A1

公开(公告)日：2019-05-30

申请号：US15880324

申请日：2018-01-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Nai-Hao YANG ,  Hung-Wen SU ,  Kuan-Chia CHEN

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/285 ,  H01L21/67 ,  H01L21/324

CPC classification number: H01L21/76877 ,  H01L21/2855 ,  H01L21/324 ,  H01L21/67103 ,  H01L23/53238

Abstract: The present disclosure provides methods for forming a conductive fill material (e.g., a conductive feature) by a physical vapor deposition (PVD) process. In one embodiment, a method of forming a conductive fill material on a substrate includes maintaining a first substrate temperature at a first range for a first period of time while forming a pre-layer of a conductive fill material on a substrate, providing a thermal energy to the substrate to maintain the substrate at a second substrate temperature at a second range for a second period of time, wherein the second substrate temperature is higher than the first substrate temperature, and continuously providing the thermal energy to the substrate to maintain the substrate a third substrate temperature at a third range for a third period of time to form a bulk layer of the conductive fill material on the substrate