公开(公告)号：US20250022940A1

公开(公告)日：2025-01-16

申请号：US18350429

申请日：2023-07-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Chun LU ,  Yi-Hsing CHU ,  Chia-Yi TSENG

IPC: H01L29/66 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

Abstract: The present disclosure describes forming a semiconductor structure having an isolation layer surrounding a portion of a gate structure. The semiconductor structure includes a channel structure on a substrate, a first isolation layer on the substrate and surrounding the channel structure, and a gate structure on the channel structure and the first isolation layer. The gate structure includes a first portion having a first width and a second portion having a second width less than the first width. The semiconductor structure further includes a second isolation layer on the first isolation layer and surrounding the first portion of the gate structure.

公开(公告)号：US20240429285A1

公开(公告)日：2024-12-26

申请号：US18339549

申请日：2023-06-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Chun LU ,  Yi-Hsing CHU ,  Chia-Yi TSENG

IPC: H01L29/10 ,  H01L29/66 ,  H01L29/78

Abstract: The present disclosure describes forming a semiconductor structure having an isolation layer surrounding a sloped portion of a channel structure. The semiconductor structure includes a channel structure having first, second, and third portions on a substrate. The first portion has a first width. The second portion has a second width less than the first width. The third portion has a third width less than the second width. The semiconductor structure further includes a first isolation layer on the substrate and surrounding the first portion, a second isolation layer on the first isolation layer and surrounding the second portion of the channel structure, and a gate structure on the second isolation layer and surrounding the third portion of the channel structure.