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    SYSTEMS AND METHODS FOR SOFTWARE INSTRUCTION TRANSLATION FROM A HIGH-LEVEL LANGUAGE TO A SPECIALIZED INSTRUCTION SET
    1.
    发明申请
    SYSTEMS AND METHODS FOR SOFTWARE INSTRUCTION TRANSLATION FROM A HIGH-LEVEL LANGUAGE TO A SPECIALIZED INSTRUCTION SET 有权
    从高级语言到特殊指令集的软件指导翻译的系统和方法

    公开(公告)号：US20130185703A1

    公开(公告)日：2013-07-18

    申请号：US13743555

    申请日：2013-01-17

    申请人： TEXAS INSTRUMENTS INCORPORATED

    发明人： Alan L. DAVIS ,  Ching-Yu HUNG ,  Jadadeesh SANKARAN ,  James NAGURNE ,  Mel Alan PHIPPS ,  Ajay JAYARAJ

    IPC分类号： G06F9/45

    CPC分类号： G06F8/41 ,  G06F8/447

    摘要： A computer system includes a processor and program storage coupled to the processor. The program storage stores a software instruction translator that, when executed by the processor, is configured to receive source code and translate the source code to a low-level language. The source code is restricted to a subset of a high-level language and the low-level language is a specialized instruction set. Each statement of the subset of the high-level language directly maps to an instruction of the low-level language.

    摘要翻译： 计算机系统包括耦合到处理器的处理器和程序存储器。 程序存储器存储软件指令转换器，当由处理器执行时，其被配置为接收源代码并将源代码转换为低级语言。 源代码限于高级语言的子集，低级语言是专门的指令集。 高级语言的子集的每个陈述直接映射到低级语言的指令。

    ENTERING PROTECTED PIPELINE MODE WITH CLEARING
    2.
    发明申请
    ENTERING PROTECTED PIPELINE MODE WITH CLEARING 有权

    公开(公告)号：US20210326136A1

    公开(公告)日：2021-10-21

    申请号：US17360646

    申请日：2021-06-28

    申请人： TEXAS INSTRUMENTS INCORPORATED

    发明人： Timothy D. ANDERSON ,  Joseph ZBICIAK ,  Duc BUI ,  Mel Alan PHIPPS ,  Todd T. HAHN

    IPC分类号： G06F9/30 ,  G06F9/38 ,  G06F11/10 ,  G06F9/32 ,  G06F12/0875 ,  G06F12/0897 ,  G06F11/00 ,  G06F9/345

    摘要： Techniques related to executing a plurality of instructions by a processor comprising receiving a first instruction for execution on an instruction execution pipeline, wherein the instruction execution pipeline is in a first execution mode, beginning execution of the first instruction on the instruction execution pipeline, receiving an execution mode instruction to switch the instruction execution pipeline to a second execution mode, switching the instruction execution pipeline to the second execution mode based on the received execution mode instruction, annulling the first instruction based on the execution mode instruction, receiving a second instruction for execution on the instruction execution pipeline, the second instruction, and executing the second instruction.