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公开(公告)号：US20210194477A1
公开(公告)日：2021-06-24
申请号：US16722454
申请日：2019-12-20
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Sudarshan UDAYASHANKAR , Martijn Fridus SNOEIJ
IPC: H03K17/082 , H03K17/06 , H03K19/018 , H01L29/66
Abstract: An amplifier overload power limit circuit, system, and a method thereof comprising a monitoring of a current gain of a BJT based on a current detector and limiting power to the BJT based on the monitored current gain to prevent the BJT from driven into a saturation mode and the amplifier overdrive.
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公开(公告)号：US20220231680A1
公开(公告)日：2022-07-21
申请号：US17715605
申请日：2022-04-07
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Sudarshan UDAYASHANKAR , Martijn Fridus SNOEIJ
IPC: H03K17/082 , H01L29/66
Abstract: An amplifier overload power limit circuit, system, and a method thereof comprising a monitoring of a current gain of a BJT based on a current detector and limiting power to the BJT based on the monitored current gain to prevent the BJT from driven into a saturation mode and the amplifier overdrive.
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公开(公告)号：US20190190472A1
公开(公告)日：2019-06-20
申请号：US15848808
申请日：2017-12-20
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Martijn Fridus SNOEIJ , Sudarshan UDAYASHANKAR
CPC classification number: H03F3/45089 , H03F3/165 , H03F3/45188 , H03F2203/45061 , H03F2203/45248
Abstract: An input stage of an operational amplifier receives first and second input voltages. An output slew detection circuit decreases a first current responsive to slewing of an output of the operational amplifier and increases the first current responsive to no slewing. A slew boost and differential input voltage detection generates a second current at a first level when the first and second input voltages are approximately equal and to generate the second current at a second level, smaller than the first level, responsive to the first and second input voltages not being approximately equal. A voltage on a capacitor increases responsive to the first current from the output slew detection circuit increasing and responsive to the second current being at the second level. A current mirror is activated responsive to the voltage on the capacitor exceeding a second threshold. The current mirror decreases a third current of the input stage.
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Patent Agency Ranking
公开(公告)号：US20210067112A1
公开(公告)日：2021-03-04
申请号：US16937746
申请日：2020-07-24
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Martijn Fridus SNOEIJ , Marco CORSI
IPC: H03F3/45
Abstract: A logarithmic amplifier circuit includes an adaptive gain amplifier circuit and a transistor. The adaptive gain amplifier circuit includes a gain stage and a diode. The gain stage includes an input terminal, and an output terminal. The diode includes a cathode terminal coupled to the output terminal, and an anode terminal coupled to a common terminal. The transistor includes a first terminal coupled to the input terminal, a second terminal coupled to the common terminal, and a third terminal coupled to the output terminal.
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公开(公告)号：US20190190471A1
公开(公告)日：2019-06-20
申请号：US15848700
申请日：2017-12-20
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Martijn Fridus SNOEIJ , Steven Graham BRANTLEY
CPC classification number: H03F3/45089 , H03F3/165 , H03F3/45071 , H03F3/45085 , H03F3/45094 , H03F3/45183 , H03F3/45188 , H03F2203/45061 , H03F2203/45134 , H03F2203/45248
Abstract: An operational amplifier includes an input stage configured to receive a first input voltage and a second input voltage and a slew boost circuit coupled to the input stage and configured to selectively increase current through the input stage. The operational amplifier also includes an output stage coupled to the input stage and configured to generate an output voltage, and a slew boost disable circuit configured to assert a control signal to the slew boost circuit to disable the slew boost circuit. The slew boost circuit is disabled when both: the first input voltage being more than a first threshold voltage different from the second input voltage and the output voltage failing to change by more than a second threshold rate.
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6.发明申请公开(公告)号：US20200153449A1
公开(公告)日：2020-05-14
申请号：US16740519
申请日：2020-01-13
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Martijn Fridus SNOEIJ , Mikhail Valeryevich IVANOV , Roberto Giampiero MASSOLINI , Brian David JOHNSON
Abstract: In at least some embodiments, a system comprises a frequency generator configured to generate a second clock signal having a second frequency using a first clock signal having a first frequency. The second frequency is offset from the first frequency and each of a plurality of harmonic frequencies of the second frequency is offset from a harmonic frequency of the first frequency. The system also includes a power converter configured to produce a power signal that at least partially corresponds to the second frequency. The system further comprises an analog-to-digital converter (ADC) configured to sample and convert analog voltages at the first frequency. The ADC is powered by the power signal.
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7.发明申请公开(公告)号：US20190158105A1
公开(公告)日：2019-05-23
申请号：US16233198
申请日：2018-12-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Martijn Fridus SNOEIJ , Mikhail Valeryevich IVANOV , Roberto Giampiero MASSOLINI , Brian David JOHNSON
CPC classification number: H03M1/124 , H03L7/08 , H03L7/18 , H03M1/0845 , H03M1/12
Abstract: In at least some embodiments, a system comprises a frequency generator configured to generate a second clock signal having a second frequency using a first clock signal having a first frequency. The second frequency is offset from the first frequency and each of a plurality of harmonic frequencies of the second frequency is offset from a harmonic frequency of the first frequency. The system also includes a power converter configured to produce a power signal that at least partially corresponds to the second frequency. The system further comprises an analog-to-digital converter (ADC) configured to sample and convert analog voltages at the first frequency. The ADC is powered by the power signal.
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8.发明申请公开(公告)号：US20180191366A1
公开(公告)日：2018-07-05
申请号：US15395212
申请日：2016-12-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Martijn Fridus SNOEIJ , Mikhail Valeryevich IVANOV , Roberto Giampiero MASSOLINI , Brian David JOHNSON
CPC classification number: H03M1/124 , H03L7/08 , H03L7/18 , H03M1/0845 , H03M1/12
Abstract: In at least some embodiments, a system comprises a frequency generator configured to generate a second clock signal having a second frequency using a first clock signal having a first frequency. The second frequency is offset from the first frequency and each of a plurality of harmonic frequencies of the second frequency is offset from a harmonic frequency of the first frequency. The system also includes a power converter configured to produce a power signal that at least partially corresponds to the second frequency. The system further comprises an analog-to-digital converter (ADC) configured to sample and convert analog voltages at the first frequency. The ADC is powered by the power signal.
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