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公开(公告)号:US20240322799A1
公开(公告)日:2024-09-26
申请号:US18240796
申请日:2023-08-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Deep BANERJEE , Lokesh Kumar GUPTA , Madhulatha BONU
Abstract: An analog duty-cycle detector includes: off-time detection circuitry; on-time detection circuitry; compare circuitry; and a controller. The off-time detection circuitry includes a first transistor and a first capacitor. The on-time detection circuitry includes a second transistor and a second capacitor. The compare circuitry has a first terminal, a second terminal, and a third terminal. The first terminal of the compare circuitry is coupled to a first terminal of the first capacitor. The second terminal of the compare circuitry is coupled to a first terminal of the second capacitor. The controller has a first terminal and a second terminal. The first terminal of the controller coupled to a control terminal of the first transistor. The second terminal of the controller coupled to the control terminal of the second transistor.
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公开(公告)号:US20200267018A1
公开(公告)日:2020-08-20
申请号:US16538975
申请日:2019-08-13
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Lokesh Kumar GUPTA , Basant BOTHRA
Abstract: A system includes a controller area network (CAN) transceiver. The CAN transceiver includes a wake-up circuit having an attenuator circuit coupled to a CAN bus. The wake-up circuit also includes a common-gate amplifier circuit coupled to the attenuator circuit. The wake-up circuit also includes an offset generation circuit coupled to the common-gate amplifier circuit.
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公开(公告)号:US20200264643A1
公开(公告)日:2020-08-20
申请号:US16459107
申请日:2019-07-01
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Deep BANERJEE , Lokesh Kumar GUPTA , Abhijeeth AAREY PREMANATH , Richard Sterling BROUGHTON
Abstract: A bus transceiver circuit including a current source device, a current mirror coupled to the current source device, and a first transistor having a first control input and first and second current terminals. The bus transceiver circuit also includes a second transistor having a second control input and third and fourth current terminals. The third current terminal is coupled to the first control input at a first node. The fourth current terminal is coupled to the current mirror. A resistor is coupled between the first current terminal and the first node.
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公开(公告)号:US20250007513A1
公开(公告)日:2025-01-02
申请号:US18344990
申请日:2023-06-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Amit PATIL , Deep BANERJEE , Lokesh Kumar GUPTA , Viswanathan Venkatesh KUMAR , Upasana BHATTACHARYA , Pallabi PRAMANIK
IPC: H03K17/687 , H04L12/40
Abstract: In an example, a CAN transceiver includes a first transistor having a control terminal, having a drain coupled to a voltage supply terminal, and having a source. The CAN transceiver includes a second transistor having a drain coupled to a control terminal of the first transistor, a source coupled to the source of the first transistor, and a control terminal. The CAN transceiver includes a bias circuit coupled to the control terminal of the second transistor, the second transistor configured to convert the first transistor to a diode configuration responsive to detecting high voltage noise.
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5.
公开(公告)号:US20200303920A1
公开(公告)日:2020-09-24
申请号:US16411251
申请日:2019-05-14
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Shishir GOYAL , Lokesh Kumar GUPTA
Abstract: A positive overshoot detection circuit comprises a transistor coupled to a current mirror, a reference current source coupled to the current mirror, and a comparator coupled to the reference current source and the current mirror. The comparator output indicates whether the current mirror's current is greater than the reference current source's current. A control input and a current terminal of the transistor are coupled to a clamping circuit. A negative overshoot detection circuit comprises a biasing sub-circuit coupled to a transistor, a resistor coupled to the transistor, and a comparator coupled to the transistor and the resistor. The comparator output indicates whether the transistor is in an on or off state. The biasing sub-circuit is coupled to a clamping circuit. In some implementations, the comparator outputs from the positive and negative overshoot detection circuits are provided to a driver circuit, which modifies its operation.
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6.
公开(公告)号:US20240097437A1
公开(公告)日:2024-03-21
申请号:US18522644
申请日:2023-11-29
Applicant: Texas Instruments Incorporated
Inventor: Shishir GOYAL , Lokesh Kumar GUPTA
IPC: H02H9/04 , G01R19/10 , G01R19/165 , H02H1/00 , H03K17/082
CPC classification number: H02H9/045 , G01R19/10 , G01R19/16571 , H02H1/0007 , H03K17/0822 , H03K17/0826
Abstract: A positive overshoot detection circuit comprises a transistor coupled to a current mirror, a reference current source coupled to the current mirror, and a comparator coupled to the reference current source and the current mirror. The comparator output indicates whether the current mirror's current is greater than the reference current source's current. A control input and a current terminal of the transistor are coupled to a clamping circuit. A negative overshoot detection circuit comprises a biasing sub-circuit coupled to a transistor, a resistor coupled to the transistor, and a comparator coupled to the transistor and the resistor. The comparator output indicates whether the transistor is in an on or off state. The biasing sub-circuit is coupled to a clamping circuit. In some implementations, the comparator outputs from the positive and negative overshoot detection circuits are provided to a driver circuit, which modifies its operation.
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公开(公告)号:US20200312946A1
公开(公告)日:2020-10-01
申请号:US16692349
申请日:2019-11-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Basant BOTHRA , Lokesh Kumar GUPTA
Abstract: An electrical device includes an integrated circuit having device circuitry, a passive breakdown protection circuit, and a resistor coupled to or included with the device circuitry. The resistor includes: a polysilicon layer coupled between a first terminal and a second terminal; an epitaxial layer terminal; and a buried layer terminal. The passive breakdown protection circuit is coupled between the second terminal and the epitaxial layer terminal. The passive breakdown protection circuit is also coupled between the epitaxial layer terminal and the buried layer terminal.
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