公开(公告)号：US20240322799A1

公开(公告)日：2024-09-26

申请号：US18240796

申请日：2023-08-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Deep BANERJEE ,  Lokesh Kumar GUPTA ,  Madhulatha BONU

IPC: H03K3/017 ,  H03K3/037 ,  H03K17/56

CPC classification number: H03K3/017 ,  H03K3/037 ,  H03K17/56

Abstract: An analog duty-cycle detector includes: off-time detection circuitry; on-time detection circuitry; compare circuitry; and a controller. The off-time detection circuitry includes a first transistor and a first capacitor. The on-time detection circuitry includes a second transistor and a second capacitor. The compare circuitry has a first terminal, a second terminal, and a third terminal. The first terminal of the compare circuitry is coupled to a first terminal of the first capacitor. The second terminal of the compare circuitry is coupled to a first terminal of the second capacitor. The controller has a first terminal and a second terminal. The first terminal of the controller coupled to a control terminal of the first transistor. The second terminal of the controller coupled to the control terminal of the second transistor.

公开(公告)号：US20220352706A1

公开(公告)日：2022-11-03

申请号：US17244692

申请日：2021-04-29

Applicant: Texas Instruments Incorporated

Inventor： Ishaan KUBBA ,  Sreeram NASUM SUBRAMANYAM ,  Shishir GOYAL ,  Deep BANERJEE

IPC: H02H3/00 ,  H03K5/24 ,  H03K5/01

Abstract: An input/output (I/O) interface includes a resistance-to-current (R/I) converter; an internal resistor; first, second, and third current sources; first and second diodes; and a comparator. The R/I converter is coupled to an I/O pin and generates an output current based on an external resistance at the I/O pin during an analog operating mode. The internal resistor is coupled to the I/O pin and to ground. The first current source is coupled to the R/I converter circuit. The first diode is coupled to the R/I converter and to the I/O pin. The second current source is coupled to the R/I converter and the first diode and to ground. The second diode is coupled to the I/O pin and to the third current source. The comparator has inputs coupled to the I/O pin and to a reference voltage, and outputs a control signal indicative of a digital operating mode.

公开(公告)号：US20200264643A1

公开(公告)日：2020-08-20

申请号：US16459107

申请日：2019-07-01

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Deep BANERJEE ,  Lokesh Kumar GUPTA ,  Abhijeeth AAREY PREMANATH ,  Richard Sterling BROUGHTON

IPC: G05F1/56 ,  H04L12/40 ,  H04B1/40

Abstract: A bus transceiver circuit including a current source device, a current mirror coupled to the current source device, and a first transistor having a first control input and first and second current terminals. The bus transceiver circuit also includes a second transistor having a second control input and third and fourth current terminals. The third current terminal is coupled to the first control input at a first node. The fourth current terminal is coupled to the current mirror. A resistor is coupled between the first current terminal and the first node.

公开(公告)号：US20250007513A1

公开(公告)日：2025-01-02

申请号：US18344990

申请日：2023-06-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Amit PATIL ,  Deep BANERJEE ,  Lokesh Kumar GUPTA ,  Viswanathan Venkatesh KUMAR ,  Upasana BHATTACHARYA ,  Pallabi PRAMANIK

IPC: H03K17/687 ,  H04L12/40

Abstract: In an example, a CAN transceiver includes a first transistor having a control terminal, having a drain coupled to a voltage supply terminal, and having a source. The CAN transceiver includes a second transistor having a drain coupled to a control terminal of the first transistor, a source coupled to the source of the first transistor, and a control terminal. The CAN transceiver includes a bias circuit coupled to the control terminal of the second transistor, the second transistor configured to convert the first transistor to a diode configuration responsive to detecting high voltage noise.

公开(公告)号：US20220190866A1

公开(公告)日：2022-06-16

申请号：US17123915

申请日：2020-12-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Viswanathan Venkatesh KUMAR ,  Deep BANERJEE ,  Shishir GOYAL ,  Sreeram NASUM SUBRAMANYAM

IPC: H04B1/40 ,  H03K5/24 ,  H04B3/54 ,  H04B3/56

Abstract: An on-off keying (OOK) receiver circuit includes a band-pass filter and an envelope detector. The band-pass filter includes a high-pass filter, a low-pass filter, and a switch. The high-pass filter is configured to filter an OOK input signal. The low-pass filter is configured to filter an output signal of the high-pass filter. The switch is coupled to an output of the high-pass filter, and is configured to, with each cycle of the OOK input signal, dissipate energy stored in the band-pass filter. The envelope detector is configured to receive a filtered OOK input signal from the band-pass filter, and to generate an OOK output signal based on the filtered OOK input signal.