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公开(公告)号:US11049660B2
公开(公告)日:2021-06-29
申请号:US16354811
申请日:2019-03-15
摘要: A multi-layer ceramic electronic component includes a ceramic body including: a multi-layer unit including a capacitance forming unit including ceramic layers laminated in a first direction and internal electrodes disposed therebetween, a side surface facing in a second direction orthogonal to the first direction, an end surface facing in a third direction orthogonal to the above directions, a drawn portion extending from the capacitance forming unit in the third direction, the internal electrodes being drawn to the end surface, and a cover that covers the capacitance forming unit and the drawn portion in the first direction; and a side margin that covers the side surface. The drawn portion includes a first region and a second region disposed between the cover and the first region, an end portion of each internal electrode in the second region being positioned inward in the second direction relative to that in the first region.
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公开(公告)号:US10475581B2
公开(公告)日:2019-11-12
申请号:US15836718
申请日:2017-12-08
发明人: Kazumi Kaneda , Yasuyuki Inomata , Mikio Tahara
摘要: A multilayer ceramic capacitor includes: a multilayer chip in which each of dielectric layers and each of internal electrode layers are alternately stacked and are alternately exposed to two edge faces thereof; and external electrodes formed on the two edge faces; wherein: the external electrodes have a structure in which a plated layer is formed on a ground layer whose main component is a metal or an alloy, a thermal expansion coefficient of the metal being larger than that of a main ceramic component of the dielectric layer, the ground layer including a ceramic additive; outermost layers of the multilayer chip are cover layers whose main component is a main component of the dielectric layer; and thermal expansion coefficients satisfy a relationship of, the main component of the ground layer>the main component of the cover layers>the ceramic additive.
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公开(公告)号:US11705281B2
公开(公告)日:2023-07-18
申请号:US17359238
申请日:2021-06-25
发明人: Tomoaki Nakamura , Mikio Tahara , Masako Kanou , Fusao Sato
CPC分类号: H01G4/30 , H01G4/012 , H01G4/1227 , H01G4/228
摘要: A multilayer ceramic capacitor includes: a multilayer chip in which dielectric layers mainly composed of ceramic and internal electrode layers are alternately stacked so that the internal electrode layers are alternately exposed to two end faces of the multilayer chip having a substantially rectangular parallelepiped shape; and a pair of external electrodes formed from the two end faces to at least one side face of side faces, wherein each external electrode includes a metal layer formed from the end face to the at least one side face and mainly composed of copper, and an oxide layer covering at least a part of the metal layer, mainly composed of copper oxide, and having a maximum thickness of 0.5 μm or greater, wherein a first surface, which is in contact with the plated layer, of the oxide layer has Cu particles formed thereon.
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公开(公告)号:US11581140B2
公开(公告)日:2023-02-14
申请号:US17038805
申请日:2020-09-30
发明人: Tomoaki Nakamura , Mikio Tahara , Sadanori Shimoda
摘要: A ceramic electronic component includes a multilayer chip having a substantially rectangular parallelepiped shape and including dielectric layers and internal electrode layers that are alternately stacked, the internal electrode layers being alternately exposed to two edge faces of the multilayer chip facing each other, and a pair of external electrodes respectively formed on the two edge faces so as to be connected to the internal electrode layers exposed on the respective edge faces, each external electrode extending to at least one side face of the multilayer chip, wherein in the multilayer chip, oxides including Zn and Ni are present around the internal electrode layer in a vicinity of a connection part connecting the internal electrode layer to the external electrode.
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5.
公开(公告)号:US11081282B2
公开(公告)日:2021-08-03
申请号:US16410914
申请日:2019-05-13
发明人: Tomoaki Nakamura , Mikio Tahara , Masako Kanou , Fusao Sato
摘要: A multilayer ceramic capacitor includes: a multilayer chip in which dielectric layers mainly composed of ceramic and internal electrode layers are alternately stacked so that the internal electrode layers are alternately exposed to two end faces, which face each other, of the multilayer chip, the multilayer chip having a substantially rectangular parallelepiped shape; and a pair of external electrodes formed from the two end faces of the multilayer chip to at least one side face of side faces of the multilayer chip, wherein each of the pair of external electrodes includes a metal layer and an oxide layer, the metal layer being formed from the end face to the at least one side face and being mainly composed of copper, the oxide layer covering at least a part of the metal layer, being mainly composed of copper oxide, and having a maximum thickness of 0.5 μm or greater.
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公开(公告)号:US11557434B2
公开(公告)日:2023-01-17
申请号:US17116336
申请日:2020-12-09
申请人: TAIYO YUDEN CO., LTD
发明人: Satoshi Kobayashi , Takahisa Fukuda , Tomoaki Nakamura , Mikio Tahara , Naoki Saito , Kiyoshiro Yatagawa
摘要: A ceramic electronic component includes external electrodes having conductive resin layers thereinside on respective two ends opposed to each other in a rectangular parallelepiped ceramic component body. Each of the external electrodes includes an underlying metal layer, an intermediate metal layer, a conductive resin layer, an external metal layer. A tip angle α between an outer face of a tip portion of the wraparound portion of the underlying metal layer and a surface of the ceramic component body is 20° or smaller, and a tip angle β between an outer face of a tip portion of the wraparound portion of the intermediate metal layer and a surface of the ceramic component body is 20° or smaller.
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公开(公告)号:US10971302B2
公开(公告)日:2021-04-06
申请号:US16438272
申请日:2019-06-11
摘要: A multilayer ceramic capacitor includes: a multilayer chip in which each of dielectric layers and each of internal electrode layers are alternately stacked and the internal electrode layers are alternately exposed to two end faces; and external electrodes formed on the two end faces; wherein: a relationship “M≥−0.00002×EM+0.0012” is satisfied, when a length of end margins in a direction in which the two end faces face with each other is EM [μm] and a ratio of Mo [atm %] to a B site element [atm %] of a main component ceramic in the end margins is M, wherein the end margin is a region, in which internal electrode layers connected to one of the external electrodes without sandwiching internal electrode layers connected to the other of the external electrode, face with each other, in the multilayer chip.
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公开(公告)号:US10312020B2
公开(公告)日:2019-06-04
申请号:US15600609
申请日:2017-05-19
发明人: Minoru Ryu , Mikio Tahara , Hirokazu Orimo
摘要: In an embodiment, a multilayer ceramic capacitor 10 has a first external electrode 12 and a second external electrode 13 that each contain metal grains MP and dielectric grains DP, where an oxide of the same metal element constituting the metal grain MP, or MO, is present at the interface between the metal grain MP and the dielectric grain DP. The multilayer ceramic capacitor can prevent the hardness of its external electrodes from dropping, even when the external electrodes contain metal grains and dielectric grains.
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公开(公告)号:US11842854B2
公开(公告)日:2023-12-12
申请号:US17563474
申请日:2021-12-28
CPC分类号: H01G4/232 , H01G4/12 , H01G4/30 , H01G13/006
摘要: A ceramic electronic device includes: a ceramic main body having a parallelepiped shape in which edges of first internal electrode layers are led out to a first edge face and edges of second internal electrode layer are led out to a second edge face facing the first edge face; and external electrodes respectively formed on the first edge face and the second edge face and extending to at least one side face of the ceramic main body, wherein a distance in a length direction between first conductive layers of the respective external electrodes on the at least one side face is shorter between locations corresponding to corner portions of the ceramic main body, respectively, than between center portions of the first conductive layers of the respective external electrodes in a width direction orthogonal to the length direction on the at least one side face.
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公开(公告)号:US11749458B2
公开(公告)日:2023-09-05
申请号:US17584964
申请日:2022-01-26
发明人: Mikio Tahara
摘要: A ceramic electronic device includes a multilayer chip including a multilayer structure, a first cover layer and a second cover layer and having a parallelepiped shape, the multilayer structure having a structure in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked and are alternately exposed to a first end face and a second end face of the multilayer chip, the first end face being opposite to the second end face, the first cover layer being provided on an upper face of the multilayer structure in a stacking direction, the second cover layer being provided on a lower face of the multilayer structure, a first external electrode formed on the first end face, and a second external electrode formed on the second end face. In this structure, a relationship of 0.20≤R1/√{square root over ( )}(P12−C12)≤0.80 is satisfied.
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