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公开(公告)号:US12009260B2
公开(公告)日:2024-06-11
申请号:US17011801
申请日:2020-09-03
Inventor: Ka Fai Chang , Fong-Yuan Chang , Chin-Chou Liu , Yi-Kan Cheng
IPC: H01L21/822 , G06F30/398 , G06F119/06 , H01L23/00 , H01L23/522 , H01L23/528
CPC classification number: H01L21/8221 , G06F30/398 , H01L23/5227 , H01L23/5286 , H01L24/42 , G06F2119/06
Abstract: A method for forming an integrated circuit (IC) is provided. The method includes the following operations. A circuit layout including a first load region and a second load region is received. A full power network of the circuit layout is obtained. The full power network is transformed into a first power network according to the first load region. A first power simulation is performed upon the first power network. The full power network is transformed into a second power network according to the second load region. A second power simulation is performed upon the second power network. The IC is fabricated according to the circuit layout.
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公开(公告)号:US10811316B2
公开(公告)日:2020-10-20
申请号:US16102589
申请日:2018-08-13
Inventor: Ka Fai Chang , Fong-Yuan Chang , Chin-Chou Liu , Yi-Kan Cheng
IPC: H01L21/822 , H01L23/522 , H01L23/528 , H01L23/00
Abstract: A method for forming an integrated circuit (IC) is provided. The method includes the following operations. A circuit layout including a first load region and a second load region is received. A full power network of the circuit layout is obtained. The full power network is transformed into a first power network according to the first load region. A first power simulation is performed upon the first power network. The full power network is transformed into a second power network according to the second load region. A second power simulation is performed upon the second power network. The IC is fabricated according to the circuit layout.
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