公开(公告)号：US11171111B2

公开(公告)日：2021-11-09

申请号：US16753758

申请日：2018-10-02

Applicant: Synaptics Incorporated

Inventor： Kazuhiro Okamura ,  Takeshi Okubo ,  Yuichi Nakagomi ,  Takefumi Seno

IPC: H01L23/00

Abstract: An integrated circuit device comprises: a resin film that is flexible; a plurality of traces bonded on a surface of the resin film and arrayed in a specific direction; an IC chip bonded on the surface of the resin film, located offset to the traces in a direction perpendicular to the specific direction, and connected to the traces; and a protection pattern formed on the surface of the resin film, located in the specific direction with respect to a disposition region in which the IC chip and/or the traces are disposed, and formed of the same material as that of the traces.

公开(公告)号：US12051355B1

公开(公告)日：2024-07-30

申请号：US18342105

申请日：2023-06-27

Applicant: Synaptics Incorporated

Inventor： Kazuhiro Okamura

IPC: G09G3/30 ,  G09G3/20 ,  G09G3/3225 ,  G09G3/36 ,  H01L23/00

CPC classification number: G09G3/2007 ,  G09G3/3225 ,  H01L24/14 ,  H01L24/16 ,  G09G2300/0819 ,  G09G2310/08 ,  G09G2320/0626 ,  H01L2224/14133 ,  H01L2224/14177 ,  H01L2224/16225

Abstract: A display driver includes a bump array with a staggered bump arrangement, a data compensation circuit, and driver circuitry. The data compensation circuit processes input pixel data for a pixel of a display panel to generate compensated pixel data. The driver circuitry generates a data voltage based on the compensated pixel data and output the data voltage to the pixel via a bump of the bump array. The processing of the input pixel data is based on a location of the bump in the bump array.

公开(公告)号：US11195493B2

公开(公告)日：2021-12-07

申请号：US16871979

申请日：2020-05-11

Applicant: Synaptics Incorporated

Inventor： Kazuhiro Okamura ,  Atsushi Maruyama ,  Daisuke Ito ,  Takashi Nose ,  Hirobumi Furihata

IPC: G09G5/10 ,  G09G3/20 ,  G06F3/041

Abstract: One or more embodiments are directed to compensating for a long horizontal blank (LHB) period. Using a first display data value, a compensation amount is determined from a mapping between display data and compensation amounts. The first display data value is for a display row after an LHB period in a display frame of a display panel. A second display data value is adjusted with the compensation amount to obtain revised display data value. The revised display data value is outputted for the display panel.

公开(公告)号：US20200279828A1

公开(公告)日：2020-09-03

申请号：US16753758

申请日：2018-10-02

Applicant: Synaptics Incorporated

Inventor： Kazuhiro Okamura ,  Takeshi Okubo ,  Yuichi Nakagomi ,  Takefumi Senou

IPC: H01L23/00

Abstract: An integrated circuit device comprises: a resin film that is flexible; a plurality of traces bonded on a surface of the resin film and arrayed in a specific direction; an IC chip bonded on the surface of the resin film, located offset to the traces in a direction perpendicular to the specific direction, and connected to the traces; and a protection pattern formed on the surface of the resin film, located in the specific direction with respect to a disposition region in which the IC chip and/or the traces are disposed, and formed of the same material as that of the traces.

公开(公告)号：US11164511B2

公开(公告)日：2021-11-02

申请号：US16836476

申请日：2020-03-31

Applicant: Synaptics Incorporated

Inventor： Atsushi Maruyama ,  Kazuhiro Okamura ,  Daisuke Ito

IPC: G09G3/32

Abstract: A display panel includes a first scan driving circuit, a second scan driving circuit, and a third scan driving circuit. The first scan driving circuit is configured to generate a first gate scan signal to control programming of a first display line in a first horizontal sync period that includes a long horizontal blank (LHB) period. The second scan driving circuit is configured to generate a first dummy gate scan signal to control initialization of a second display line in the LHB period of the first horizontal sync period. The third scan driving circuit is configured to generate a second gate scan signal to control programming of the second display line in a second horizontal sync period that follows the first horizontal sync period.

公开(公告)号：US20210304660A1

公开(公告)日：2021-09-30

申请号：US16836476

申请日：2020-03-31

Applicant: Synaptics Incorporated

Inventor： Atsushi Maruyama ,  Kazuhiro Okamura ,  Daisuke Ito

IPC: G09G3/32

Abstract: A display panel includes a first scan driving circuit, a second scan driving circuit, and a third scan driving circuit. The first scan driving circuit is configured to generate a first gate scan signal to control programming of a first display line in a first horizontal sync period that includes a long horizontal blank (LHB) period. The second scan driving circuit is configured to generate a first dummy gate scan signal to control initialization of a second display line in the LHB period of the first horizontal sync period. The third scan driving circuit is configured to generate a second gate scan signal to control programming of the second display line in a second horizontal sync period that follows the first horizontal sync period.

公开(公告)号：US20210350763A1

公开(公告)日：2021-11-11

申请号：US16871979

申请日：2020-05-11

Applicant: Synaptics Incorporated

Inventor： Kazuhiro Okamura ,  Atsushi Maruyama ,  Daisuke Ito ,  Takashi Nose ,  Hirobumi Furihata

IPC: G09G5/10 ,  G09G3/20

Abstract: One or more embodiments are directed to compensating for a long horizontal blank (LHB) period. Using a first display data value, a compensation amount is determined from a mapping between display data and compensation amounts. The first display data value is for a display row after an LHB period in a display frame of a display panel. A second display data value is adjusted with the compensation amount to obtain revised display data value. The revised display data value is outputted for the display panel.

公开(公告)号：US11151941B1

公开(公告)日：2021-10-19

申请号：US16893776

申请日：2020-06-05

Applicant: Synaptics Incorporated

Inventor： Atsushi Shikata ,  Kazuhiro Okamura ,  Hirobumi Furihata ,  Shigeru Ota ,  Makoto Takeuchi

IPC: G09G3/32 ,  G09G3/3258

Abstract: A display driver includes signal supply circuitry and a power source controller. The signal supply circuitry is configured to update a display panel during a refresh period and not update the display panel during a non-refresh period that follows the refresh period. The power source controller is configured to modify a high-side power source voltage supplied to the display panel at least during the non-refresh period.