公开(公告)号：US20120122291A1

公开(公告)日：2012-05-17

申请号：US13337611

申请日：2011-12-27

Applicant: Sandra G. Malhotra ,  Pragati Kumar ,  Sean Barstow ,  Tony Chiang ,  Prashant B. Phatak ,  Wen Wu ,  Sunil Shanker

Inventor： Sandra G. Malhotra ,  Pragati Kumar ,  Sean Barstow ,  Tony Chiang ,  Prashant B. Phatak ,  Wen Wu ,  Sunil Shanker

IPC: H01L21/02

CPC classification number: H01L45/1608 ,  H01L27/2418 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1641

Abstract: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.

Abstract translation: 提供了基于电阻式开关存储元件层的非易失性存储元件。 非易失性存储元件可以具有电阻性开关金属氧化物层。 电阻式开关金属氧化物层可以具有一层或多层氧化物。 电阻式开关金属氧化物可以掺杂有增加其熔融温度并增强其热稳定性的掺杂剂。 可以形成层以增强非易失性存储元件的热稳定性。 用于非易失性存储元件的电极可以包含导电层和缓冲层。

公开(公告)号：US20120100724A1

公开(公告)日：2012-04-26

申请号：US13337759

申请日：2011-12-27

Applicant: Sunil Shanker ,  Tony Chiang

Inventor： Sunil Shanker ,  Tony Chiang

IPC: H01L21/31

CPC classification number: C23C16/047 ,  C23C16/04 ,  C23C16/45536 ,  C23C16/45551 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/45591 ,  C23C16/4583 ,  C23C16/46 ,  C23C16/50 ,  C23C16/5096 ,  C23C16/52 ,  H01J37/32357 ,  H01J37/32366

Abstract: Combinatorial plasma enhanced deposition techniques are described, including designating multiple regions of a substrate, providing a precursor to at least a first region of the multiple regions, and providing a plasma to the first region to deposit a first material on the first region formed using the first precursor, wherein the first material is different from a second material formed on a second region of the substrate.

公开(公告)号：US20090026434A1

公开(公告)日：2009-01-29

申请号：US12179538

申请日：2008-07-24

Applicant: Sandra G. Malhotra ,  Pragati Kumar ,  Sean Barstow ,  Tony Chiang ,  Prashant B. Phatak ,  Wen Wu ,  Sunil Shanker

Inventor： Sandra G. Malhotra ,  Pragati Kumar ,  Sean Barstow ,  Tony Chiang ,  Prashant B. Phatak ,  Wen Wu ,  Sunil Shanker

IPC: H01L47/00 ,  H01L21/00

CPC classification number: H01L45/1608 ,  H01L27/2418 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1641

Abstract: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.

Abstract translation: 提供了基于电阻式开关存储元件层的非易失性存储元件。 非易失性存储元件可以具有电阻性开关金属氧化物层。 电阻式开关金属氧化物层可以具有一层或多层氧化物。 电阻式开关金属氧化物可以掺杂有增加其熔融温度并增强其热稳定性的掺杂剂。 可以形成层以增强非易失性存储元件的热稳定性。 用于非易失性存储元件的电极可以包含导电层和缓冲层。

公开(公告)号：US08372758B2

公开(公告)日：2013-02-12

申请号：US13334549

申请日：2011-12-22

Applicant: Sunil Shanker ,  Tony Chiang

Inventor： Sunil Shanker ,  Tony Chiang

IPC: H01L21/31

CPC classification number: C23C16/047 ,  C23C16/04 ,  C23C16/45536 ,  C23C16/45551 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/45591 ,  C23C16/4583 ,  C23C16/46 ,  C23C16/50 ,  C23C16/5096 ,  C23C16/52 ,  H01J37/32357 ,  H01J37/32366

Abstract: Combinatorial plasma enhanced deposition techniques are described, including designating multiple regions of a substrate, providing a precursor to at least a first region of the multiple regions, and providing a plasma to the first region to deposit a first material on the first region formed using the first precursor, wherein the first material is different from a second material formed on a second region of the substrate.

公开(公告)号：US20120061799A1

公开(公告)日：2012-03-15

申请号：US12901239

申请日：2010-10-08

Applicant: Imran Hashim ,  Indranil De ,  Tony Chiang ,  Edward Haywood ,  Hanhong Chen ,  Nobi Fuchigami ,  Pragati Kumar ,  Sandra Malhotra ,  Sunil Shanker

Inventor： Imran Hashim ,  Indranil De ,  Tony Chiang ,  Edward Haywood ,  Hanhong Chen ,  Nobi Fuchigami ,  Pragati Kumar ,  Sandra Malhotra ,  Sunil Shanker

IPC: H01L29/92

CPC classification number: H01L28/40 ,  C23C14/083 ,  C23C14/3464 ,  C23C16/405 ,  C23C16/45531 ,  H01L21/02186 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/02266 ,  H01L21/0228

Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium, to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions.

Abstract translation: 本公开内容提供（a）制造基于钇和钛的氧化物层（例如，电介质层）的方法，以具有高介电常数和低泄漏特性，以及（b）相关的器件和结构。 具有钇和钛的氧化物层可以制成无定形氧化物或交替的单层系列。 在几个实施方案中，氧化物的特征在于对特定控制的总金属的钇贡献。 如果需要，氧化物层可以通过PVD工艺或者通过使用特定前体材料以允许钛和钇的共同工艺温度窗口的原子层沉积工艺作为反应过程的结果来生产 反应。

公开(公告)号：US20090227067A1

公开(公告)日：2009-09-10

申请号：US12400655

申请日：2009-03-09

Applicant: Pragati Kumar ,  Sean Barstow ,  Sunil Shanker ,  Tony Chiang

Inventor： Pragati Kumar ,  Sean Barstow ,  Sunil Shanker ,  Tony Chiang

IPC: H01L21/00

CPC classification number: H01L45/1633 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146

Abstract: Resistive switching nonvolatile memory elements are provided. A metal-containing layer and an oxide layer for a memory element can be heated using rapid thermal annealing techniques. During heating, the oxide layer may decompose and react with the metal-containing layer. Oxygen from the decomposing oxide layer may form a metal oxide with metal from the metal-containing layer. The resulting metal oxide may exhibit resistive switching for the resistive switching memory elements.

Abstract translation: 提供电阻式开关非易失性存储元件。 可以使用快速热退火技术来加热含金属层和用于存储元件的氧化物层。 在加热期间，氧化物层可能分解并与含金属层反应。 来自分解氧化物层的氧可以从含金属的层与金属形成金属氧化物。 所得到的金属氧化物可以表现出用于电阻式开关存储元件的电阻式开关。

公开(公告)号：US08294219B2

公开(公告)日：2012-10-23

申请号：US12179538

申请日：2008-07-24

Applicant: Sandra G. Malhotra ,  Pragati Kumar ,  Sean Barstow ,  Tony Chiang ,  Prashant B. Phatak ,  Wen Wu ,  Sunil Shanker

Inventor： Sandra G. Malhotra ,  Pragati Kumar ,  Sean Barstow ,  Tony Chiang ,  Prashant B. Phatak ,  Wen Wu ,  Sunil Shanker

IPC: H01L21/02

CPC classification number: H01L45/1608 ,  H01L27/2418 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1641

Abstract: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.

Abstract translation: 提供了基于电阻式开关存储元件层的非易失性存储元件。 非易失性存储元件可以具有电阻性开关金属氧化物层。 电阻式开关金属氧化物层可以具有一层或多层氧化物。 电阻式开关金属氧化物可以掺杂有增加其熔融温度并增强其热稳定性的掺杂剂。 可以形成层以增强非易失性存储元件的热稳定性。 用于非易失性存储元件的电极可以包含导电层和缓冲层。

公开(公告)号：US08278735B2

公开(公告)日：2012-10-02

申请号：US12901239

申请日：2010-10-08

Applicant: Imran Hashim ,  Indranil De ,  Tony Chiang ,  Edward Haywood ,  Hanhong Chen ,  Nobi Fuchigami ,  Pragati Kumar ,  Sandra Malhotra ,  Sunil Shanker

Inventor： Imran Hashim ,  Indranil De ,  Tony Chiang ,  Edward Haywood ,  Hanhong Chen ,  Nobi Fuchigami ,  Pragati Kumar ,  Sandra Malhotra ,  Sunil Shanker

IPC: H01L21/02

CPC classification number: H01L28/40 ,  C23C14/083 ,  C23C14/3464 ,  C23C16/405 ,  C23C16/45531 ,  H01L21/02186 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/02266 ,  H01L21/0228

Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium, to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions.

Abstract translation: 本公开内容提供（a）制造基于钇和钛的氧化物层（例如，电介质层）的方法，以具有高介电常数和低泄漏特性，以及（b）相关的器件和结构。 具有钇和钛的氧化物层可以制成无定形氧化物或交替的单层系列。 在几个实施方案中，氧化物的特征在于对特定控制的总金属的钇贡献。 如果需要，可以通过PVD工艺或者通过使用特定的前体材料以允许钛和钇的共同工艺温度窗口的原子层沉积工艺，作为反应过程的结果来生产氧化物层 反应。

公开(公告)号：US20120100723A1

公开(公告)日：2012-04-26

申请号：US13337728

申请日：2011-12-27

Applicant: Sunil Shanker ,  Tony Chiang

Inventor： Sunil Shanker ,  Tony Chiang

IPC: H01L21/31

CPC classification number: C23C16/047 ,  C23C16/04 ,  C23C16/45536 ,  C23C16/45551 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/45591 ,  C23C16/4583 ,  C23C16/46 ,  C23C16/50 ,  C23C16/5096 ,  C23C16/52 ,  H01J37/32357 ,  H01J37/32366

Abstract: Combinatorial plasma enhanced deposition techniques are described, including designating multiple regions of a substrate, providing a precursor to at least a first region of the multiple regions, and providing a plasma to the first region to deposit a first material on the first region formed using the first precursor, wherein the first material is different from a second material formed on a second region of the substrate.

公开(公告)号：US08129288B2

公开(公告)日：2012-03-06

申请号：US12433842

申请日：2009-04-30

Applicant: Sunil Shanker ,  Tony Chiang

Inventor： Sunil Shanker ,  Tony Chiang

IPC: H01L21/31

CPC classification number: C23C16/047 ,  C23C16/04 ,  C23C16/45536 ,  C23C16/45551 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/45591 ,  C23C16/4583 ,  C23C16/46 ,  C23C16/50 ,  C23C16/5096 ,  C23C16/52 ,  H01J37/32357 ,  H01J37/32366

Abstract: Combinatorial plasma enhanced deposition techniques are described, including designating multiple regions of a substrate, providing a precursor to at least a first region of the multiple regions, and providing a plasma to the first region to deposit a first material on the first region formed using the first precursor, wherein the first material is different from a second material formed on a second region of the substrate.

Abstract translation: 描述组合等离子体增强沉积技术，包括指定衬底的多个区域，为多个区域的至少第一区域提供前体，以及向第一区域提供等离子体，以将第一材料沉积在使用 第一前体，其中所述第一材料不同于形成在所述基底的第二区域上的第二材料。