Frequency doubler for an optical transceiver clock recovery circuit
    1.
    发明授权
    Frequency doubler for an optical transceiver clock recovery circuit 失效
    用于光收发器时钟恢复电路的倍频器

    公开(公告)号:US5774002A

    公开(公告)日:1998-06-30

    申请号:US843900

    申请日:1997-04-25

    CPC classification number: H03K5/00006 H04L7/027

    Abstract: A clock recovery circuit is disclosed for recovering the data of a non-return to zero signal received at an optical transceiver. The clock recovery circuit includes an active element mixer for doubling the frequency of the received non-return to zero encoded digital signal. The mixer includes a delay element for delaying the received non-return to zero signal and an exclusive-OR circuit for exclusive-ORing the delayed and received non-return to zero signals. A SAW filter is also provided for recovering a clock from the frequency doubled signal outputted by the mixer.

    Abstract translation: 公开了一种用于恢复在光收发器处接收的不归零信号的数据的时钟恢复电路。 时钟恢复电路包括有源元件混频器,用于将接收的不返回零编码的数字信号的频率加倍。 混频器包括用于将接收的不返回零信号延迟的延迟元件和用于对延迟和接收的不归零信号进行异或运算的异或电路。 还提供了一种SAW滤波器,用于从由混频器输出的倍频信号中恢复时钟。

Patent Agency Ranking