All flash array server and control method thereof

    公开(公告)号:US11216348B2

    公开(公告)日:2022-01-04

    申请号:US17156613

    申请日:2021-01-24

    Inventor: Li-Sheng Kan

    Abstract: The present invention provides a control method of a server, wherein the control method includes the steps of: periodically controlling a first register and a second register of a first node to have a first value and a second value, respectively; periodically controlling a third register and a fourth register of a second node to have a third value and a fourth value, respectively; controlling the first register and the fourth register to synchronize with each other, wherein the first value is different from the fourth value; controlling the second register and the third register to synchronize with each other, wherein the second value is different from the third value; and periodically checking if the third register has the third value and the fourth register has the fourth value to determine if the first node fails to work.

    Method for managing data stored in flash memory and associated memory device and controller

    公开(公告)号:US10324786B2

    公开(公告)日:2019-06-18

    申请号:US15717970

    申请日:2017-09-28

    Abstract: A method for managing data stored in a flash memory is provided, where the flash memory includes a plurality of blocks. The method includes: providing a program list, where the program list records information about programmed blocks of the plurality of blocks and sequence of write times of the programmed blocks; detecting quality of a first block of the plurality of blocks to generate a detecting result, where the first block is the programmed block that has an earliest write time; and determining whether to move contents of the first block to a blank block, and to delete the contents of the first block according to the detecting result.

    ALL FLASH ARRAY SERVER AND CONTROL METHOD THEREOF

    公开(公告)号:US20210271419A1

    公开(公告)日:2021-09-02

    申请号:US17151677

    申请日:2021-01-19

    Inventor: Li-Sheng Kan

    Abstract: The present invention provides a control method of a server, wherein the control method includes the steps of: setting a first node within the server as a master device; setting a second node within the server as a slave device; controlling the first node to receive data from another device via network; storing the data into a first write buffer within the first node; performing a cache mirroring operation to copy the data stored in the first write buffer into a second write buffer within the second node; setting a first tail register and a first head register within the first node, and setting a second tail register and a second head register within the second node; and referring to the first tail register and the first head register to determine if the data stored in the first write buffer is successful written into the second write buffer.

    METHOD FOR MANAGING DATA STORED IN FLASH MEMORY AND ASSOCIATED MEMORY DEVICE AND CONTROLLER
    4.
    发明申请
    METHOD FOR MANAGING DATA STORED IN FLASH MEMORY AND ASSOCIATED MEMORY DEVICE AND CONTROLLER 有权
    用于管理存储在闪速存储器中的数据的方法以及相关的存储器件和控制器

    公开(公告)号:US20140032993A1

    公开(公告)日:2014-01-30

    申请号:US13950301

    申请日:2013-07-25

    Abstract: A method for managing data stored in a flash memory is provided, where the flash memory includes a plurality of blocks. The method includes: providing a program list, where the program list records information about programmed blocks of the plurality of blocks and sequence of write times of the programmed blocks; detecting quality of a first block of the plurality of blocks to generate a detecting result, where the first block is the programmed block that has an earliest write time; and determining whether to move contents of the first block to a blank block, and to delete the contents of the first block according to the detecting result.

    Abstract translation: 提供了一种管理存储在闪存中的数据的方法,其中闪速存储器包括多个块。 该方法包括:提供程序列表,其中程序列表记录关于多个块的编程块的信息和编程块的写入时间序列; 检测多个块的第一块的质量以产生检测结果,其中第一块是具有最早写入时间的编程块; 以及确定是否将第一块的内容移动到空白块,并且根据检测结果来删除第一块的内容。

    Storage node failure detection based on register values for an all flash array server

    公开(公告)号:US11809293B2

    公开(公告)日:2023-11-07

    申请号:US17534386

    申请日:2021-11-23

    Inventor: Li-Sheng Kan

    CPC classification number: G06F11/2092 G06F11/0763 G06F11/2023

    Abstract: The present invention provides a control method of a server, wherein the control method includes the steps of: periodically controlling a first register and a second register of a first node to have a first value and a second value, respectively; periodically controlling a third register and a fourth register of a second node to have a third value and a fourth value, respectively; controlling the first register and the fourth register to synchronize with each other, wherein the first value is different from the fourth value; controlling the second register and the third register to synchronize with each other, wherein the second value is different from the third value; and periodically checking if the third register has the third value and the fourth register has the fourth value to determine if the first node fails to work.

    All flash array server and control method thereof

    公开(公告)号:US11366618B2

    公开(公告)日:2022-06-21

    申请号:US17151677

    申请日:2021-01-19

    Inventor: Li-Sheng Kan

    Abstract: The present invention provides a control method of a server, wherein the control method includes the steps of: setting a first node within the server as a master device; setting a second node within the server as a slave device; controlling the first node to receive data from another device via network; storing the data into a first write buffer within the first node; performing a cache mirroring operation to copy the data stored in the first write buffer into a second write buffer within the second node; setting a first tail register and a first head register within the first node, and setting a second tail register and a second head register within the second node; and referring to the first tail register and the first head register to determine if the data stored in the first write buffer is successful written into the second write buffer.

    ALL FLASH ARRAY SERVER AND CONTROL METHOD THEREOF

    公开(公告)号:US20220083438A1

    公开(公告)日:2022-03-17

    申请号:US17534386

    申请日:2021-11-23

    Inventor: Li-Sheng Kan

    Abstract: The present invention provides a control method of a server, wherein the control method includes the steps of: periodically controlling a first register and a second register of a first node to have a first value and a second value, respectively; periodically controlling a third register and a fourth register of a second node to have a third value and a fourth value, respectively; controlling the first register and the fourth register to synchronize with each other, wherein the first value is different from the fourth value; controlling the second register and the third register to synchronize with each other, wherein the second value is different from the third value; and periodically checking if the third register has the third value and the fourth register has the fourth value to determine if the first node fails to work.

    ALL FLASH ARRAY SERVER AND CONTROL METHOD THEREOF

    公开(公告)号:US20210271478A1

    公开(公告)日:2021-09-02

    申请号:US17156613

    申请日:2021-01-24

    Inventor: Li-Sheng Kan

    Abstract: The present invention provides a control method of a server, wherein the control method includes the steps of: periodically controlling a first register and a second register of a first node to have a first value and a second value, respectively; periodically controlling a third register and a fourth register of a second node to have a third value and a fourth value, respectively; controlling the first register and the fourth register to synchronize with each other, wherein the first value is different from the fourth value; controlling the second register and the third register to synchronize with each other, wherein the second value is different from the third value; and periodically checking if the third register has the third value and the fourth register has the fourth value to determine if the first node fails to work.

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