Linear voltage to current converter including feedback network
    1.
    发明授权
    Linear voltage to current converter including feedback network 失效
    线性电压到电流转换器包括反馈网络

    公开(公告)号:US5317279A

    公开(公告)日:1994-05-31

    申请号:US999316

    申请日:1992-12-31

    IPC分类号: H03F1/32 H03F3/45

    CPC分类号: H03F1/3211 H03F3/4569

    摘要: A voltage to current converter includes three field effect transistors (FETs), the sources of which are electrically connected to define a common source node, and a feedback network. First and second voltage inputs are connected to the gates of the first and second FETs, respectively. First and second current outputs are connected to the drains of the first and second FETs, respectively. The feedback network is connected between the drain of the third FET and the common source node. The feedback network controls and extends linearity by varying the voltage between the common source node and ground in response to changes in the voltage inputs in order to maintain a constant current through the third FET. The floating common source node quickly adjusts and thereby keeps a linear relationship between the input voltages and the output currents. Thus, the feedback network can dynamically bias the converter by permitting the common source node to float with respect to ground.

    摘要翻译: 电压 - 电流转换器包括三个场效应晶体管(FET),其源极电连接以定义公共源节点和反馈网络。 第一和第二电压输入分别连接到第一和第二FET的栅极。 第一和第二电流输出分别连接到第一和第二FET的漏极。 反馈网络连接在第三FET的漏极和公共源节点之间。 反馈网络通过响应于电压输入的变化改变公共源节点和地之间的电压来控制和扩展线性,以便保持通过第三FET的恒定电流。 浮动公共源节点快速调整,从而保持输入电压和输出电流之间的线性关系。 因此,反馈网络可以通过允许公共源节点相对于地面浮动来动态地偏置转换器。

    High density integrated circuit with high output impedance
    2.
    发明授权
    High density integrated circuit with high output impedance 失效
    具有高输出阻抗的高密度集成电路

    公开(公告)号:US5337021A

    公开(公告)日:1994-08-09

    申请号:US75941

    申请日:1993-06-14

    CPC分类号: G05F3/262 G05F3/267

    摘要: A circuit apparatus suitable for use as a basic building block of very small geometry integrated circuits (on the order of 1 micron and smaller) comprising (i) a current mirror circuit with a cascode output, comprising a first transistor and a second transistor connected in series, the first transistor coupled between a ground and the second transistor, and (ii) a single stage gain loop comprising a transresistance amplifier coupled between a control input of the second transistor and the series connection of the first and second transistors, wherein the circuit apparatus provides an output with high impedance output and with maximum swing capability.

    摘要翻译: 一种适合用作非常小几何集成电路(大约1微米或更小)的基本构建块的电路装置,包括:(i)具有共源共栅输出的电流镜像电路,包括第一晶体管和连接在其中的第二晶体管 串联,耦合在地和第二晶体管之间的第一晶体管,以及(ii)单级增益环,包括耦合在第二晶体管的控制输入端和第一和第二晶体管的串联连接之间的跨阻放大器,其中电路 设备提供具有高阻抗输出和最大摆幅能力的输出。

    System for spraying ceramic slurries onto surfaces in contact with
molten metals
    3.
    发明授权
    System for spraying ceramic slurries onto surfaces in contact with molten metals 失效
    将陶瓷浆料喷涂到与熔融金属接触的表面上的系统

    公开(公告)号:US5284296A

    公开(公告)日:1994-02-08

    申请号:US805513

    申请日:1991-12-12

    摘要: A system for spraying ceramic coatings on surfaces in contact with molten metals in which a constant amount of slurry made from water and ceramic powder is supplied to a pump and a hose for applying the slurry to the surface to be coated. Activation of an air valve delivers air to the hose at a sufficient pressure to spray the slurry on the surface to be coated. Deactivation of the air valve shuts off the pump.

    摘要翻译: 用于在与熔融金属接触的表面上喷涂陶瓷涂层的系统,其中将一定量的由水和陶瓷粉末制成的浆料供应到泵和用于将浆料施加到待涂覆的表面上的软管。 空气阀的激活以足够的压力将空气输送到软管,以将浆料喷射在待涂覆的表面上。 空气阀的停用关闭泵。

    Constant transductance input stage and integrated circuit
implementations thereof
    4.
    发明授权
    Constant transductance input stage and integrated circuit implementations thereof 失效
    恒定转换输入级及其集成电路实现

    公开(公告)号:US5714906A

    公开(公告)日:1998-02-03

    申请号:US514910

    申请日:1995-08-14

    IPC分类号: H03F3/30 H03F3/45

    摘要: A low voltage constant transconductance input stage is achieved with relatively simple design methodology. The approach uses current-mode techniques and is based upon the processing of signal currents, rather than handling the bias currents of input stages. Such an approach becomes universal and independent of the input stage transistor types (FET or bipolar) and their operating regions. Further, the arrangement considerably simplifies the design procedure of low voltage operational amplifiers. MOS and bipolar Op Amp input stages are described wherein almost constant g.sub.m is achieved which is independent of the common mode input voltage ranging from rail-to-rail.

    摘要翻译: 使用相对简单的设计方法实现低电压恒定跨导输入级。 该方法使用电流模式技术,并且基于信号电流的处理,而不是处理输入级的偏置电流。 这种方法变得通用且独立于输入级晶体管类型(FET或双极型)及其工作区域。 此外,该布置大大简化了低压运算放大器的设计过程。 描述MOS和双极性运算放大器输入级,其中实现几乎恒定的gm,其独立于从轨至轨的共模输入电压。

    Constant transconductance bias circuit and method
    5.
    发明授权
    Constant transconductance bias circuit and method 失效
    恒定跨导偏置电路及方法

    公开(公告)号:US5384548A

    公开(公告)日:1995-01-24

    申请号:US111708

    申请日:1993-08-25

    IPC分类号: H03F3/345 H03F3/45

    摘要: The reduction of the power supply voltage of VLSI circuits to 3.3 volts results in a significant loss in input and output swing in traditional CMOS analog circuits. In order to achieve rail-to-rail operation, n-channel and p-channel MOSFETs are placed in parallel so that at least one type of transistors are operating in a high gain region throughout the entire input range. However, circuit characteristics change as transistors turn on and off. A constant transconductance bias means enables the rail-to-rail CMOS differential stage to possess a constant transconductance over the entire common mode voltage range. Significantly, the bias circuit does not require any matching between the transistors of opposite types.

    摘要翻译: 将VLSI电路的电源电压降低至3.3伏,导致传统CMOS模拟电路的输入和输出摆​​幅明显下降。 为了实现轨到轨操作,n沟道和p沟道MOSFET并联放置,使得至少一种类型的晶体管在整个输入范围内的高增益区域中工作。 然而,晶体管导通和关断时,电路特性会发生变化。 恒定的跨导偏置装置使得轨到轨CMOS差分级能够在整个共模电压范围内具有恒定的跨导。 重要的是,偏置电路不需要相反类型的晶体管之间的任何匹配。