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公开(公告)号:US08624665B2
公开(公告)日:2014-01-07
申请号:US12462176
申请日:2009-07-30
申请人: Sang-moo Choi , Won-joo Kim , Tae-hee Lee , Dae-kil Cha
发明人: Sang-moo Choi , Won-joo Kim , Tae-hee Lee , Dae-kil Cha
IPC分类号: H03K3/01
CPC分类号: H01L27/10802 , G11C11/404 , G11C2207/2227 , G11C2211/4016 , H01L21/84 , H01L27/10844 , H01L29/7841
摘要: Provided is a method of operating a semiconductor device, wherein an operating mode is set by adjusting timing of a voltage pulse or by adjusting a voltage level of the voltage pulse.
摘要翻译: 提供了一种操作半导体器件的方法,其中通过调整电压脉冲的定时或通过调节电压脉冲的电压电平来设置操作模式。
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公开(公告)号:US20100133600A1
公开(公告)日:2010-06-03
申请号:US12591686
申请日:2009-11-30
申请人: Won-joo Kim , Sang-moo Choi , Tae-hee Lee , Yoon-dong Park , Dae-kil Cha
发明人: Won-joo Kim , Sang-moo Choi , Tae-hee Lee , Yoon-dong Park , Dae-kil Cha
IPC分类号: H01L29/788 , H01L21/28
CPC分类号: H01L29/7881 , G11C11/404 , G11C2211/4016 , H01L27/108 , H01L27/10802 , H01L29/7841
摘要: One transistor (1-T) dynamic random access memories (DRAM) having improved sensing margins that are relatively independent of the amount of carriers stored in a body region thereof.
摘要翻译: 具有改善的感测余量的一个晶体管(1-T)动态随机存取存储器(DRAM),其相对独立于存储在其身体区域中的载体的量。
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公开(公告)号:US20100097124A1
公开(公告)日:2010-04-22
申请号:US12462176
申请日:2009-07-30
申请人: Sang-moo Choi , Won-joo Kim , Tae-hee Lee , Dae-kil Cha
发明人: Sang-moo Choi , Won-joo Kim , Tae-hee Lee , Dae-kil Cha
IPC分类号: H03K3/01
CPC分类号: H01L27/10802 , G11C11/404 , G11C2207/2227 , G11C2211/4016 , H01L21/84 , H01L27/10844 , H01L29/7841
摘要: Provided is a method of operating a semiconductor device, wherein an operating mode is set by adjusting timing of a voltage pulse or by adjusting a voltage level of the voltage pulse.
摘要翻译: 提供了一种操作半导体器件的方法,其中通过调整电压脉冲的定时或通过调节电压脉冲的电压电平来设置操作模式。
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公开(公告)号:US20110121390A1
公开(公告)日:2011-05-26
申请号:US12929455
申请日:2011-01-26
申请人: Won-joo Kim , Tae-hee Lee , Dae-kil Cha , Yoon-dong Park
发明人: Won-joo Kim , Tae-hee Lee , Dae-kil Cha , Yoon-dong Park
IPC分类号: H01L27/12
CPC分类号: H01L29/7841
摘要: Semiconductor substrates and methods of manufacturing the same are provided. The semiconductor substrates include a substrate region, an insulation region and a floating body region. The insulation region is disposed on the substrate region. The floating body region is separated from the substrate region by the insulation region and is disposed on the insulation region. The substrate region and the floating body region are formed of materials having identical characteristics. The method of manufacturing the semiconductor substrate including forming at least one floating body pattern by etching a bulk substrate, separating the bulk substrate into a substrate region and a floating body region by etching a lower middle portion of the floating body pattern, and filling an insulating material between the floating body region and the substrate region.
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公开(公告)号:US20090212364A1
公开(公告)日:2009-08-27
申请号:US12219360
申请日:2008-07-21
申请人: Won-joo Kim , Tae-hee Lee , Dae-kil Cha , Yoon-dong Park
发明人: Won-joo Kim , Tae-hee Lee , Dae-kil Cha , Yoon-dong Park
CPC分类号: H01L29/7841
摘要: Semiconductor substrates and methods of manufacturing the same are provided. The semiconductor substrates include a substrate region, an insulation region and a floating body region. The insulation region is disposed on the substrate region. The floating body region is separated from the substrate region by the insulation region and is disposed on the insulation region. The substrate region and the floating body region are formed of materials having identical characteristics. The method of manufacturing the semiconductor substrate including forming at least one floating body pattern by etching a bulk substrate, separating the bulk substrate into a substrate region and a floating body region by etching a lower middle portion of the floating body pattern, and filling an insulating material between the floating body region and the substrate region.
摘要翻译: 提供半导体基板及其制造方法。 半导体衬底包括衬底区域,绝缘区域和浮体区域。 绝缘区域设置在基板区域上。 浮体区域通过绝缘区域与基板区域分离,并且设置在绝缘区域上。 基板区域和浮体区域由具有相同特性的材料形成。 制造半导体衬底的方法包括通过蚀刻大块衬底形成至少一个浮体图案,通过蚀刻浮体图案的下部中间部分将本体衬底分离成衬底区域和浮体区域,以及填充绝缘体 在浮体区域和衬底区域之间的材料。
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6.
公开(公告)号:US20090212320A1
公开(公告)日:2009-08-27
申请号:US12219990
申请日:2008-07-31
申请人: Won-joo Kim , Dae-kil Cha , Tae-hee Lee , Yoon-dong Park
发明人: Won-joo Kim , Dae-kil Cha , Tae-hee Lee , Yoon-dong Park
IPC分类号: H01L29/739
CPC分类号: H01L29/7391 , G11C11/404 , G11C2211/4016 , H01L21/84 , H01L27/1023 , H01L27/108 , H01L27/10802 , H01L27/10873 , H01L27/1203 , H01L29/7841 , H01L29/8618
摘要: Semiconductor devices and semiconductor apparatuses including the same are provided. The semiconductor devices include a body region disposed on a semiconductor substrate, gate patterns disposed on the semiconductor substrate and on opposing sides of the body region, and first and second impurity doped regions disposed on an upper surface of the body region. The gate patterns may be separated from the first and second impurity doped regions by, or greater than, a desired distance, such that the gate patterns do not to overlap the first and second impurity doped regions in a direction perpendicular to the first and second impurity doped regions.
摘要翻译: 提供包括其的半导体器件和半导体器件。 半导体器件包括设置在半导体衬底上的主体区域,设置在半导体衬底上并位于体区域的相对侧上的栅极图案,以及设置在身体区域的上表面上的第一和第二杂质掺杂区域。 栅极图案可以与第一和第二杂质掺杂区域分开或大于期望的距离,使得栅极图案在垂直于第一和第二杂质的方向上不与第一和第二杂质掺杂区域重叠 掺杂区域。
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公开(公告)号:US07902007B2
公开(公告)日:2011-03-08
申请号:US12219360
申请日:2008-07-21
申请人: Won-joo Kim , Tae-hee Lee , Dae-kil Cha , Yoon-dong Park
发明人: Won-joo Kim , Tae-hee Lee , Dae-kil Cha , Yoon-dong Park
IPC分类号: H01L21/84
CPC分类号: H01L29/7841
摘要: Semiconductor substrates and methods of manufacturing the same are provided. The semiconductor substrates include a substrate region, an insulation region and a floating body region. The insulation region is disposed on the substrate region. The floating body region is separated from the substrate region by the insulation region and is disposed on the insulation region. The substrate region and the floating body region are formed of materials having identical characteristics. The method of manufacturing the semiconductor substrate including forming at least one floating body pattern by etching a bulk substrate, separating the bulk substrate into a substrate region and a floating body region by etching a lower middle portion of the floating body pattern, and filling an insulating material between the floating body region and the substrate region.
摘要翻译: 提供半导体基板及其制造方法。 半导体衬底包括衬底区域,绝缘区域和浮体区域。 绝缘区域设置在基板区域上。 浮体区域通过绝缘区域与基板区域分离,并且设置在绝缘区域上。 基板区域和浮体区域由具有相同特性的材料形成。 制造半导体衬底的方法包括通过蚀刻大块衬底形成至少一个浮体图案,通过蚀刻浮体图案的下部中间部分将本体衬底分离成衬底区域和浮体区域,以及填充绝缘体 在浮体区域和衬底区域之间的材料。
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8.
公开(公告)号:US08258542B2
公开(公告)日:2012-09-04
申请号:US12219990
申请日:2008-07-31
申请人: Won-joo Kim , Dae-kil Cha , Tae-hee Lee , Yoon-dong Park
发明人: Won-joo Kim , Dae-kil Cha , Tae-hee Lee , Yoon-dong Park
IPC分类号: H01L29/66
CPC分类号: H01L29/7391 , G11C11/404 , G11C2211/4016 , H01L21/84 , H01L27/1023 , H01L27/108 , H01L27/10802 , H01L27/10873 , H01L27/1203 , H01L29/7841 , H01L29/8618
摘要: Semiconductor devices and semiconductor apparatuses including the same are provided. The semiconductor devices include a body region disposed on a semiconductor substrate, gate patterns disposed on the semiconductor substrate and on opposing sides of the body region, and first and second impurity doped regions disposed on an upper surface of the body region. The gate patterns may be separated from the first and second impurity doped regions by, or greater than, a desired distance, such that the gate patterns do not to overlap the first and second impurity doped regions in a direction perpendicular to the first and second impurity doped regions.
摘要翻译: 提供包括其的半导体器件和半导体器件。 半导体器件包括设置在半导体衬底上的主体区域,设置在半导体衬底上并位于体区域的相对侧上的栅极图案,以及设置在身体区域的上表面上的第一和第二杂质掺杂区域。 栅极图案可以与第一和第二杂质掺杂区域分开或大于期望的距离,使得栅极图案在垂直于第一和第二杂质的方向上不与第一和第二杂质掺杂区域重叠 掺杂区域。
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公开(公告)号:US07961539B2
公开(公告)日:2011-06-14
申请号:US12591202
申请日:2009-11-12
申请人: Sang-moo Choi , Won-joo Kim , Tae-hee Lee
发明人: Sang-moo Choi , Won-joo Kim , Tae-hee Lee
IPC分类号: G11C13/00
CPC分类号: H01L27/108 , H01L27/10802 , H01L27/10844 , H01L29/7841 , H01L29/78654
摘要: Provided is a method of operating a semiconductor device, in which a gate voltage or a drain voltage is adjusted in order to add carriers to or remove carriers from a body region, thereby realizing semiconductor having a plurality of data states.
摘要翻译: 提供了一种操作半导体器件的方法,其中调整栅极电压或漏极电压以便将载体添加到身体区域或从身体区域移除载体,从而实现具有多个数据状态的半导体。
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公开(公告)号:US07990779B2
公开(公告)日:2011-08-02
申请号:US12585540
申请日:2009-09-17
申请人: Sang-moo Choi , Won-joo Kim , Tae-hee Lee
发明人: Sang-moo Choi , Won-joo Kim , Tae-hee Lee
IPC分类号: G11C7/00
CPC分类号: G11C11/404 , G11C2211/4016 , H01L29/7841
摘要: A method of operating a semiconductor device including a memory cell of a 1-T DRAM is provided in which a gate voltage level in a hold mode is adjusted to adjust a data sensing margin of the semiconductor device.
摘要翻译: 提供一种操作包括1-T DRAM的存储单元的半导体器件的方法,其中调整保持模式中的栅极电压电平以调整半导体器件的数据感测余量。
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