公开(公告)号：US20200312760A1

公开(公告)日：2020-10-01

申请号：US16563202

申请日：2019-09-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yu-Kyung PARK ,  Seung-kwan RYU ,  Min-seung YOON ,  Yun-seok CHOI

IPC: H01L23/498 ,  H01L25/18 ,  H01L21/48

Abstract: An interposer includes: a base substrate; an interconnection structure on a top surface of the base substrate and including a metal interconnection pattern; an upper passivation layer on the interconnection structure and having compressive stress; a lower passivation layer under a bottom surface of base substrate, the lower passivation layer having compressive stress that is less than the compressive stress of the upper passivation layer; a lower conductive layer under the lower passivation layer; and a through electrode penetrating the base substrate and the lower passivation layer. The through electrode electrically connects the lower conductive layer to the metal interconnection pattern of the interconnection structure.

公开(公告)号：US20210265258A1

公开(公告)日：2021-08-26

申请号：US17316028

申请日：2021-05-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yu-Kyung PARK ,  Seung-kwan RYU ,  Min-seung YOON ,  Yun-seok CHOI

IPC: H01L23/498 ,  H01L25/18 ,  H01L21/48 ,  H01L23/538

Abstract: An interposer includes: a base substrate; an interconnection structure on a top surface of the base substrate and including a metal interconnection pattern; an upper passivation layer on the interconnection structure and having compressive stress; a lower passivation layer under a bottom surface of base substrate, the lower passivation layer having compressive stress that is less than the compressive stress of the upper passivation layer; a lower conductive layer under the lower passivation layer; and a through electrode penetrating the base substrate and the lower passivation layer. The through electrode electrically connects the lower conductive layer to the metal interconnection pattern of the interconnection structure.

公开(公告)号：US20170092663A1

公开(公告)日：2017-03-30

申请号：US15375885

申请日：2016-12-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ye-chung CHUNG ,  Hee-seok LEE ,  Yun-seok CHOI ,  Keung-beum KIM

IPC: H01L27/12 ,  H05K1/14 ,  H01L23/00 ,  G09G3/20 ,  H01L25/10

CPC classification number: H01L27/1244 ,  G02F1/13452 ,  G09G3/20 ,  G09G2300/0426 ,  G09G2310/08 ,  G09G2330/021 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/13124 ,  H01L2224/13639 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2924/1426 ,  H05K1/148

Abstract: According to example embodiments, an image display panel assembly includes a flexible printed circuit (FPC), an image display panel, at least one gate driver integrated circuit (IC) package, and at least one source driver IC package. The FPC is configured to receive gate and source driving signals. The image display panel is electrically connected to the FPC, and includes a gate driving signal transfer pattern along a first edge of the image display panel, a source driving signal transfer pattern along a second edge adjacent to the first end, and a plurality of pixels. The at least one gate driver integrated circuit (IC) package is configured to receive the gate driving signal through the gate driving signal transfer pattern and configured to provide the gate driving signal to gate lines of the plurality of pixels. The at least one source driver IC package is configured to receive the source driving signal through the source driving signal transfer pattern and configured to provide the source driving signal to source lines of the plurality of pixels.