公开(公告)号：US20230289601A1

公开(公告)日：2023-09-14

申请号：US18319140

申请日：2023-05-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun-seok PARK ,  Jin-ook Song ,  Jae-gon Lee ,  Yun-kyo Cho

IPC: G06N3/08 ,  G06N3/063 ,  G06N3/04 ,  G06F13/16

CPC classification number: G06N3/08 ,  G06N3/063 ,  G06N3/04 ,  G06F13/1673

Abstract: An integrated circuit included in a device for performing a neural network operation includes a buffer configured to store feature map data in units of cells each including at least one feature, wherein the feature map data is for use in the neural network operation; and a multiplexing circuit configured to receive the feature map data from the buffer, and output extracted data by extracting feature data of one of features that are included within a plurality of cells in the received feature map data, the features each corresponding to an identical coordinate value.

公开(公告)号：US20200082253A1

公开(公告)日：2020-03-12

申请号：US16511073

申请日：2019-07-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun-seok Park ,  Jin-ook Song ,  Jae-gon Lee ,  Yun-kyo Cho

IPC: G06N3/063 ,  G06N3/08 ,  G06N3/04

Abstract: An integrated circuit included in a device for performing a neural network operation includes a buffer configured to store feature map data in units of cells each including at least one feature, wherein the feature map data is for use in the neural network operation; and a multiplexing circuit configured to receive the feature map data from the buffer, and output extracted data by extracting feature data of one of features that are included within a plurality of cells in the received feature map data, the features each corresponding to an identical coordinate value.

公开(公告)号：US12198053B2

公开(公告)日：2025-01-14

申请号：US18319140

申请日：2023-05-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun-seok Park ,  Jin-ook Song ,  Jae-gon Lee ,  Yun-kyo Cho

IPC: G06N3/00 ,  G06F13/16 ,  G06N3/04 ,  G06N3/063 ,  G06N3/08

Abstract: An integrated circuit included in a device for performing a neural network operation includes a buffer configured to store feature map data in units of cells each including at least one feature, wherein the feature map data is for use in the neural network operation; and a multiplexing circuit configured to receive the feature map data from the buffer, and output extracted data by extracting feature data of one of features that are included within a plurality of cells in the received feature map data, the features each corresponding to an identical coordinate value.

公开(公告)号：US11694074B2

公开(公告)日：2023-07-04

申请号：US16511073

申请日：2019-07-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun-seok Park ,  Jin-ook Song ,  Jae-gon Lee ,  Yun-kyo Cho

IPC: G06F17/10 ,  G06N3/08 ,  G06N3/063 ,  G06N3/04 ,  G06F13/16

CPC classification number: G06N3/08 ,  G06F13/1673 ,  G06N3/04 ,  G06N3/063

Abstract: An integrated circuit included in a device for performing a neural network operation includes a buffer configured to store feature map data in units of cells each including at least one feature, wherein the feature map data is for use in the neural network operation; and a multiplexing circuit configured to receive the feature map data from the buffer, and output extracted data by extracting feature data of one of features that are included within a plurality of cells in the received feature map data, the features each corresponding to an identical coordinate value.