公开(公告)号：US20220122986A1

公开(公告)日：2022-04-21

申请号：US17398136

申请日：2021-08-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sukhwa JANG ,  Kanguk KIM ,  Hyunsuk NOH ,  Yeongshin PARK ,  Sangkyu SUN ,  Sunyoung LEE ,  Sohyang LEE ,  Hongjun LEE ,  Hosun JUNG ,  Jeongmin JIN ,  Jeonghee CHOI ,  Jinseo CHOI ,  Cera HONG

IPC: H01L27/108

Abstract: A method of manufacturing a semiconductor device includes forming a lower structure including a plurality of transistors, forming a conductive layer on the lower structure, forming first preliminary pad mask patterns and wiring mask patterns on the conductive layer, forming pad mask patterns by patterning the first preliminary pad mask patterns while protecting the wiring mask patterns, and etching the conductive layer using the pad mask patterns and the wiring mask patterns as an etching mask to form pad patterns and wiring patterns.

公开(公告)号：US20210098260A1

公开(公告)日：2021-04-01

申请号：US16858591

申请日：2020-04-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunchul YOON ,  Mincheol KWAK ,  Joonghee KIM ,  Jihee KIM ,  Yeongshin PARK ,  Jungheun HWANG

IPC: H01L21/308

Abstract: In order to manufacture an integrated circuit device, a feature layer is formed on a substrate in a first area for forming a plurality of chips and in a second area surrounding the first area. The feature layer has a step difference in the second area. On the feature layer, a hard mask structure including a plurality of hard mask layers stacked on each other is formed. In the first area and the second area, a protective layer covering the hard mask structure is formed. On the protective layer, a photoresist layer is formed. A photoresist pattern is formed by exposing and developing the photoresist layer in the first area by using the step difference in the second area as an alignment key.