公开(公告)号：US20180067895A1

公开(公告)日：2018-03-08

申请号：US15697082

申请日：2017-09-06

Applicant: Samsung Electronics Co., Ltd. ,  Seoul National University R&DB Foundation

Inventor： Bernhard EGGER ,  Ho-chan LEE ,  Yeon-bok LEE ,  Suk-jin KIM

IPC: G06F15/78 ,  G06F9/30 ,  G06F12/06 ,  G06F9/445

CPC classification number: G06F15/7867 ,  G06F9/30 ,  G06F9/44505 ,  G06F12/0646 ,  G06F13/42 ,  G06F15/7871 ,  H03M7/30

Abstract: Methods and apparatuses are provided for compressing configuration data. The configuration data, which includes control data corresponding to at least one processing unit used in each of a plurality of cycles, is stored. A plurality of processing units of a reconfigurable processor is divided into a plurality of groups. The configuration data is partitioned into a plurality of pieces of sub-configuration data. Each piece of sub-configuration data corresponding to a respective one of the plurality of groups. If a plurality of adjacent cycles include identical control data, the configuration data is compressed by deleting control data of all but one of the plurality of adjacent cycles, for each sub-configuration data.

公开(公告)号：US20180088954A1

公开(公告)日：2018-03-29

申请号：US15655466

申请日：2017-07-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yeon-bok LEE ,  Myung-sun KIM ,  Shin-gyu KIM

IPC: G06F9/38 ,  G06F9/30

CPC classification number: G06F9/3836 ,  G06F8/4451 ,  G06F9/3001 ,  G06F9/3017 ,  G06F9/3885

Abstract: An electronic apparatus is provided for obtaining compiling data used in an external processor including a function unit including a plurality of input ports. The electronic apparatus includes a storage configured to store a plurality of instructions, and a processor configured to schedule each of the plurality of instructions in a plurality of cycles, assign a plurality of input data corresponding to the plurality of instructions to the plurality of input ports in a corresponding cycle, and if an unassigned input port among the plurality of input ports is present in a first cycle, assign a part of input data corresponding to an instruction scheduled in a second cycle after the first cycle to the unassigned input port in the first cycle, and obtain the compiling data by assigning remaining data of the input data corresponding the instruction to one of the plurality of input ports in the second cycle.