公开(公告)号：US08923043B2

公开(公告)日：2014-12-30

申请号：US13762737

申请日：2013-02-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yang-Woo Roh ,  Chul Lee ,  Sang-Hoan Chang ,  Jae-Soo Lee ,  Joo-Young Hwang

IPC: G11C11/00 ,  G11C7/00 ,  G11C13/00 ,  G11C7/14

CPC classification number: G11C13/0004 ,  G11C7/14 ,  G11C13/004 ,  G11C13/0061 ,  G11C2013/0078 ,  G11C2213/72

Abstract: A memory device may include a normal cell which is configured to be programmed to a first resistance and stabilized as a resistance of the normal cell drifts from the first resistance to a second resistance; a flag cell which is configured to be programmed to a third resistance smaller than the first resistance and stabilized as a resistance of the flag cell drifts from the third resistance to a fourth resistance smaller than the second resistance; and a decision circuit which is configured to decide whether the flag cell has been stabilized in order to determine whether the normal cell has been stabilized.

Abstract translation: 存储器件可以包括正常单元，其被配置为被编程为第一电阻并且随着正常单元的电阻从第一电阻漂移到第二电阻而稳定; 被配置为被编程为小于所述第一电阻的第三电阻并且随着所述标志单元的电阻从所述第三电阻漂移到小于所述第二电阻的第四电阻而稳定的标志单元; 以及判定电路，其被配置为判定标志单元是否已经稳定以便确定正常单元是否已经稳定。