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公开(公告)号:US20220020627A1
公开(公告)日:2022-01-20
申请号:US17191163
申请日:2021-03-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: HWAIL JIN , SEON HO LEE , YEONGSEOK KIM
IPC: H01L21/683 , H01L21/78 , C09J7/24 , C09J7/40 , C09J7/38
Abstract: A processing tape may include a base layer, an adhesive layer disposed on the base layer, a protection release film on the adhesive layer, and a first release layer interposed between the adhesive layer and the protection release film. The first release layer may include a silicone-based material and may be non-photo-curable.
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公开(公告)号:US20190198450A1
公开(公告)日:2019-06-27
申请号:US16037226
申请日:2018-07-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Joungphil LEE , YEONGSEOK KIM
IPC: H01L23/552 , H01L23/367 , H01L23/00
Abstract: Semiconductor packages and modules are provided. The semiconductor package includes a package substrate; a semiconductor chip disposed on the package substrate; a molding layer covering the semiconductor chip and a first region of the package substrate; and a functional layer covering the molding layer and extending onto a second region of the package substrate that surrounds the first region.
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公开(公告)号:US20240312826A1
公开(公告)日:2024-09-19
申请号:US18676639
申请日:2024-05-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: HWAIL JIN , SEON HO LEE , YEONGSEOK KIM
IPC: H01L21/683 , C09J7/24 , C09J7/38 , C09J7/40 , H01L21/78
CPC classification number: H01L21/6836 , C09J7/241 , C09J7/385 , C09J7/401 , C09J7/403 , H01L21/78 , C09J2423/006 , C09J2433/005 , C09J2483/005 , Y10T428/14 , Y10T428/1457 , Y10T428/1476
Abstract: A processing tape may include a base layer, an adhesive layer disposed on the base layer, a protection release film on the adhesive layer, and a first release layer interposed between the adhesive layer and the protection release film. The first release layer may include a silicone-based material and may be non-photo-curable.
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公开(公告)号:US20200058615A1
公开(公告)日:2020-02-20
申请号:US16533450
申请日:2019-08-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: HWAIL JIN , YONGWON CHOI , MYUNG-SUNG KANG , YEONGSEOK KIM , WONKEUN KIM
Abstract: A flip chip bonding method includes obtaining a die including a first substrate and an adhesive layer on the first substrate; bonding the die to a second substrate different from the first substrate; and curing the adhesive layer. The curing the adhesive layer includes heating the second substrate to melt the adhesive layer, and providing the adhesive layer and the second substrate with air having pressure greater than atmospheric pressure.
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公开(公告)号:US20170358467A1
公开(公告)日:2017-12-14
申请号:US15470606
申请日:2017-03-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Won-Gi CHANG , YEONGSEOK KIM , Hyein YOO
IPC: H01L21/67 , H01L21/673
CPC classification number: H01L21/67121 , H01L21/568 , H01L21/673 , H01L23/3128 , H01L24/19 , H01L2224/04105 , H01L2224/12105 , H01L2924/3511
Abstract: The present disclosure relates to a method of fabricating a semiconductor package. The method may include forming a cavity in a package substrate and providing the package substrate and a die on a carrier tape film. Here, the carrier tape film may include a tape substrate and an insulating layer on the tape substrate, and the die may be provided in the cavity of the package substrate. The method may further include subsequently forming an encapsulation layer to cover the insulating layer and the die in the cavity and cover the package substrate on the insulating layer and removing the tape substrate from the insulating layer.
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