SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME

    公开(公告)号:US20240397702A1

    公开(公告)日:2024-11-28

    申请号:US18659483

    申请日:2024-05-09

    Abstract: A semiconductor memory device includes a substrate including cell and peripheral areas, a first interlayer insulating film on the substrate, a first capping film on the first interlayer insulating film, a cell gate structure in the cell area, a first bit-line structure on the cell area, a peripheral gate structure on the peripheral area, and a peripheral contact plug disposed at the peripheral area and extending through the first capping film and the first interlayer insulating film. The first capping film includes a first portion overlapping an upper surface of the peripheral gate structure and a second portion adjacent to a sidewall of the peripheral contact plug. An upper surface of the first portion is lower than an upper surface of the second portion. A width of the first plug portion is equal to a width of the second plug portion.

    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME

    公开(公告)号:US20250081430A1

    公开(公告)日:2025-03-06

    申请号:US18740045

    申请日:2024-06-11

    Abstract: A semiconductor memory device includes: a substrate including a cell area, a peripheral area, and a boundary area; a storage pad connected to an active area in the cell area; a capacitor including a lower electrode, a first electrode support layer supporting the lower electrode, a capacitor dielectric, and an upper electrode; a peripheral gate on the peripheral area of the substrate; first peripheral contact plugs on both sides of the peripheral gate and connected to the substrate; a first interlayer insulating layer on the storage pad and the first peripheral contact plugs; a second interlayer insulating layer on the first interlayer insulating layer; and a first insulating layer on the second interlayer insulating layer, wherein the first insulating layer extends on the boundary area of the substrate, and a height of the first insulating layer is equal to or less than a height of the first electrode support layer.

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