公开(公告)号：US20240397702A1

公开(公告)日：2024-11-28

申请号：US18659483

申请日：2024-05-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Hoon BAE ,  Han Seong SHIN ,  Tae Young EOM

IPC: H10B12/00 ,  H01L23/528

Abstract: A semiconductor memory device includes a substrate including cell and peripheral areas, a first interlayer insulating film on the substrate, a first capping film on the first interlayer insulating film, a cell gate structure in the cell area, a first bit-line structure on the cell area, a peripheral gate structure on the peripheral area, and a peripheral contact plug disposed at the peripheral area and extending through the first capping film and the first interlayer insulating film. The first capping film includes a first portion overlapping an upper surface of the peripheral gate structure and a second portion adjacent to a sidewall of the peripheral contact plug. An upper surface of the first portion is lower than an upper surface of the second portion. A width of the first plug portion is equal to a width of the second plug portion.