公开(公告)号：US20240332185A1

公开(公告)日：2024-10-03

申请号：US18454832

申请日：2023-08-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： TAE SUN KIM ,  WONHYUK HONG ,  JONGJIN LEE ,  KANG-ILL SEO

IPC: H01L23/528 ,  H01L21/768 ,  H01L29/417

CPC classification number: H01L23/5286 ,  H01L21/76895 ,  H01L29/41766

Abstract: Integrated circuit devices and methods of forming the same are provided. The integrated circuit devices may include a backside power distribution network structure (BSPDNS), a logic device region and a passive device region on the BSPDNS, a backside insulating layer including a first portion extending between the BSPDNS and the logic device region and a second portion extending between the BSPDNS and the passive device region, the passive device region including a semiconductor layer that is in the backside insulating layer, and a dam separating the first portion of the backside insulating layer from the semiconductor layer of the passive device region.

公开(公告)号：US20250140710A1

公开(公告)日：2025-05-01

申请号：US18644210

申请日：2024-04-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： TAE SUN KIM ,  Yeojin LEE ,  KANG-ILL SEO

IPC: H01L23/544 ,  H01L21/56 ,  H01L21/68 ,  H01L21/768

Abstract: Wafer-bonding methods are provided. A wafer-bonding method includes overlaying a first wafer and a second wafer with each other. The first wafer includes a transparent or translucent material having first alignment marks thereon. The second wafer has second alignment marks. The method includes providing light through the first wafer to check alignment of the first alignment marks with the second alignment marks. The method includes bonding the first wafer to the second wafer. Moreover, the method includes removing the transparent or translucent material while the first alignment marks remain bonded to the second wafer.