公开(公告)号：US20250062279A1

公开(公告)日：2025-02-20

申请号：US18594300

申请日：2024-03-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunggu KANG ,  Jae Choon KIM ,  Sung-Ho MUN ,  Hwanjoo PARK

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/13 ,  H01L23/31 ,  H01L23/48 ,  H01L23/522 ,  H01L25/18

Abstract: Disclosed is a semiconductor package comprising an interposer, a first semiconductor die below the interposer, and a first dummy die, a second dummy die, and a second semiconductor die over the interposer. The first semiconductor die, the second semiconductor die, the first dummy die, and the second dummy die overlap the interposer. The first semiconductor die overlaps the second semiconductor die. The second semiconductor die is between the first dummy die and the second dummy die.

公开(公告)号：US20250079338A1

公开(公告)日：2025-03-06

申请号：US18752055

申请日：2024-06-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunggu KANG ,  Youngjoon KOH ,  Jae Choon KIM ,  Sung-Ho MUN ,  Hwanjoo PARK

IPC: H01L23/00 ,  H01L23/24 ,  H01L23/28 ,  H01L23/36 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L25/16

Abstract: A semiconductor package may comrpise a substrate, a chip structure on the substrate, a passive element structure in the substrate and including a passive element, and a stiffening structure at least partially overlapping the passive element structure. A top surface of the passive element may be below a top surface of the substrate.

公开(公告)号：US20240047290A1

公开(公告)日：2024-02-08

申请号：US18184386

申请日：2023-03-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Gu KANG ,  Jae Choon KIM ,  Hwan Joo PARK ,  Sung-Ho MUN

IPC: H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L25/10

CPC classification number: H01L23/3128 ,  H01L24/16 ,  H01L21/565 ,  H01L24/73 ,  H01L24/48 ,  H01L25/105 ,  H01L24/32 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/1094 ,  H01L2225/1058 ,  H01L2224/48227 ,  H01L2924/3511 ,  H01L2224/32225

Abstract: A semiconductor package with improved thermal properties is provided. The semiconductor package includes a first package including a first die, an interposer on the first package and including a first area and a second area. A second package is on a top face of the interposer in the second area, and a thermal diffusion structure is on a top face of the interposer in the first area. The thermal diffusion structure is configured so that heat generated in the first die is discharged through the thermal diffusion structure.