公开(公告)号：US20180190821A1

公开(公告)日：2018-07-05

申请号：US15889803

申请日：2018-02-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Soo KIM ,  Gi-Gwan PARK ,  Song-E KIM ,  Koung-Min RYU ,  Sun-Ki MIN

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/417

CPC classification number: H01L29/7855 ,  H01L29/0657 ,  H01L29/41791 ,  H01L29/7843 ,  H01L29/7846 ,  H01L29/7853 ,  H01L29/7854

Abstract: A semiconductor device is provided which includes a first fin-type pattern including a first side surface and a second side surface opposite to each other, a first trench of a first depth adjacent to the first side surface, a second trench of a second depth adjacent to the second side surface. The second depth differs from the first depth, and a first field insulating film partially fills the first trench and a second field insulating film partially fills the second trench. The first fin-type pattern has a lower portion, and an upper portion having a narrower width than the lower portion, and has a first stepped portion on a boundary between the upper portion and the lower portion. The first field insulating film includes a first lower field insulating film in contact with the lower portion, and a first upper field insulating film in contact with the upper portion.

公开(公告)号：US20190051730A1

公开(公告)日：2019-02-14

申请号：US16039371

申请日：2018-07-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun-Ki MIN

IPC: H01L29/66 ,  H01L23/532 ,  H01L29/06 ,  H01L29/423 ,  H01L21/033 ,  H01L21/762

Abstract: A semiconductor device including a first insulating interlayer on a substrate; a second insulating interlayer on the first insulating interlayer; a gate structure extending through the first insulating interlayer and the second insulating interlayer on the substrate, a lower portion of the gate structure having a first width, and an upper portion of the gate structure having a second width that is greater than the first width and that gradually increases from a bottom toward a top thereof; and a spacer structure on a sidewall of the gate structure, a width of an upper portion of the spacer structure being less than a width of a lower portion of the spacer structure.

公开(公告)号：US20170053913A1

公开(公告)日：2017-02-23

申请号：US15233123

申请日：2016-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sun-Ki MIN ,  Koung-Min RYU ,  Sang-Koo KANG

IPC: H01L27/088 ,  H01L29/423 ,  H01L29/78

Abstract: There is provided a semiconductor device capable of adjusting profiles of a gate electrode and a gate spacer using a hybrid interlayer insulating film. The semiconductor device includes a gate electrode on a substrate, a gate spacer being on a sidewall of the gate electrode and including an upper portion and a lower portion, a lower interlayer insulating film being on the substrate and overlapping with the lower portion of the gate spacer, and an upper interlayer insulating film being on the lower interlayer insulating film and overlapping with the upper portion of the gate spacer, wherein the lower interlayer insulating film is not interposed between the upper interlayer insulating film and the upper portion of the gate spacer.

Abstract translation: 提供了能够使用混合层间绝缘膜来调整栅极电极和栅极间隔物的轮廓的半导体器件。 半导体器件包括在基板上的栅极电极，栅极间隔物位于栅电极的侧壁上并且包括上部和下部，下部层间绝缘膜位于衬底上并与栅极的下部重叠 间隔物和上层间绝缘膜，位于下层间绝缘膜上并与栅极间隔物的上部重叠，其中下层间绝缘膜不夹在上层间绝缘膜和栅间隔物的上部之间。