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公开(公告)号:US10797160B2
公开(公告)日:2020-10-06
申请号:US16149387
申请日:2018-10-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyun-Jun Sim , Won-Oh Seo , Sun-Jung Kim , Ki-Yeon Park
Abstract: A method of fabricating a semiconductor device may include forming a fin structure on a substrate; forming an interface film having a first thickness on the fin structure using a first process; forming a gate dielectric film having a second thickness on the interface film using a second process different from the first process; and densifying the gate dielectric film using a third process different from the first and second processes. The second thickness may be greater than the first thickness, and the first thickness of the interface film may be unchanged after the densifying of the gate dielectric film.
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公开(公告)号:US10593557B2
公开(公告)日:2020-03-17
申请号:US16123262
申请日:2018-09-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kyung-In Choi , Sang-Hoon Han , Sun-Jung Kim , Tae-Gon Kim , Hyun-Chul Song
IPC: H01L21/4763 , H01L21/3115 , H01L29/66 , H01L21/02 , H01L21/311 , H01L21/265 , H01L21/8234 , H01L29/78
Abstract: A method of manufacturing a semiconductor device, the method including forming dummy gate structures on a substrate; forming spacers on sidewalls of the dummy gate structures; forming a preliminary first interlayer insulation pattern to fill a gap between adjacent spacers; etching an upper portion of the preliminary first interlayer insulation pattern through a first etching process to form a preliminary second interlayer insulation pattern; implanting an ion on the dummy gate structures, the spacers, and the preliminary second interlayer insulation pattern through an ion-implanting process; etching an upper portion of the preliminary second interlayer insulation pattern through a second etching process to form an interlayer insulation pattern having a flat upper surface; and forming a capping pattern on the interlayer insulation pattern to fill a gap between the spacers.
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