公开(公告)号：US20210320067A1

公开(公告)日：2021-10-14

申请号：US17035000

申请日：2020-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Joo KIM ,  Sun Chul KIM ,  Min Keun KWAK ,  Hyun Ki KIM ,  Hyung Gil BAEK ,  Yong Kwan LEE

IPC: H01L23/538 ,  H01L25/10 ,  H01L25/18 ,  H01L21/48 ,  H01L23/498

Abstract: There is provided a semiconductor package capable of preventing damage to an interposer to improve reliability. The semiconductor package includes a first substrate including a first insulating layer and first conductive patterns, an interposer disposed on a top surface of the first substrate and including a second insulating layer and second conductive patterns, first connecting members in contact with the top surface of the first substrate and a bottom surface of the interposer, and supporting members including solder parts, which are in contact with the top surface of the first substrate and the bottom surface of the interposer, and core parts, which are disposed in the solder parts and include a different material from the solder parts. The first connecting members electrically connect the first conductive patterns and the second conductive patterns, and the supporting members do not electrically connect the first conductive patterns and the second conductive patterns.

公开(公告)号：US20220392845A1

公开(公告)日：2022-12-08

申请号：US17891190

申请日：2022-08-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Joo KIM ,  Sun Chul KIM ,  Min Keun KWAK ,  Hyun Ki KIM ,  Hyung Gil BAEK ,  Yong Kwan LEE

IPC: H01L23/538 ,  H01L25/10 ,  H01L25/18 ,  H01L21/48 ,  H01L23/498

Abstract: There is provided a semiconductor package capable of preventing damage to an interposer to improve reliability. The semiconductor package includes a first substrate including a first insulating layer and first conductive patterns, an interposer disposed on a top surface of the first substrate and including a second insulating layer and second conductive patterns, first connecting members in contact with the top surface of the first substrate and a bottom surface of the interposer, and supporting members including solder parts, which are in contact with the top surface of the first substrate and the bottom surface of the interposer, and core parts, which are disposed in the solder parts and include a different material from the solder parts. The first connecting members electrically connect the first conductive patterns and the second conductive patterns, and the supporting members do not electrically connect the first conductive patterns and the second conductive patterns.

公开(公告)号：US20210225796A1

公开(公告)日：2021-07-22

申请号：US17221304

申请日：2021-04-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun Chul KIM ,  Tae Hun KIM ,  Ji Hwan HWANG

IPC: H01L23/00 ,  H01L23/48 ,  H01L25/18

Abstract: A semiconductor package includes a first semiconductor chip including a first body portion, a first bonding layer including a first bonding insulating layer, a first redistribution portion including first redistribution layers, a first wiring insulating layer disposed between the first redistribution layers, and a second bonding layer including a second bonding insulating layer, a second redistribution portion including second redistribution layers, a second wiring insulating layer disposed between the second redistribution layers, and a second semiconductor chip disposed on the second redistribution portion. A lower surface of the first bonding insulating layer is bonded to an upper surface of the second bonding insulating layer, an upper surface of the first bonding insulating layer contacts the first body portion, a lower surface of the second bonding insulating layer contacts the second wiring insulating layer, and the first redistribution portion width is greater than the first semiconductor chip width.