Methods and apparatuses to reduce power dissipation in a static random access memory (SRAM) device

    公开(公告)号:US10522218B2

    公开(公告)日:2019-12-31

    申请号:US16190278

    申请日:2018-11-14

    Abstract: Embodiments herein provide a method for reducing power dissipation in a Static Random Access Memory (SRAM) device. The method includes determining, by the tracking circuit, whether at least one SRAM Bit-Cell discharges power from at least one BL exceeding a pre-defined voltage level required for a sense amplifier to perform a read operation. Furthermore, the method includes reducing, by the WL driver, the power discharged from the at least one BL by controlling a WL voltage power supply switch of the WL driver using a SAE signal and adjusting a pulse width of the at least one WL to pull down the at least one WL using a NMOS circuit when the at least one SRAM Bit-Cell discharges the power from the at least one BL exceeding the pre-defined voltage level.

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