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公开(公告)号：US20240404579A1
公开(公告)日：2024-12-05
申请号：US18539472
申请日：2023-12-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seungki Hong , Sanghak Shin
IPC: G11C11/408 , G11C11/4074
Abstract: A memory device, which may include: a memory cell array including a plurality of memory cell groups; an intermediate block configured to decode a row address, and configured to output an active block flag and a decoded row address; and a row decoder configured to select a wordline of a plurality of wordlines connected to the memory cell array based on the active block flag and the decoded row address. The row decoder may be configured to convert a portion of the row decoder from an inactive state to an active state to activate a selected memory cell group from among the plurality of memory cell groups based on a received active request, the selected memory group corresponding to the active block flag, and the row decoder may be configured to select the wordline connected to the selected memory cell group based on the decoded row address.
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公开(公告)号：US12009048B2
公开(公告)日：2024-06-11
申请号：US17813715
申请日：2022-07-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sanghak Shin , Woongdai Kang
Abstract: A semiconductor memory device includes a first power supply unit configured to, in a normal mode of a high frequency operation, supply a first power from a first global power rail to a third global power rail and a fourth global power rail in a normal mode, and, in a standby mode of a high frequency option, supply the first power to the third global power rail and not supply the first power to the fourth global power rail, and, in a normal mode of a low frequency operation, supply a second power of a second global power rail to the third global power rail and the fourth global power rail, and, in a standby mode of a low frequency operation, supply the second power to the third global power rail and not supply the second power to the fourth global power rail.
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