公开(公告)号：US11910593B2

公开(公告)日：2024-02-20

申请号：US17032655

申请日：2020-09-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yoon Young Choi ,  Seung Jin Kim ,  Byung-Hyun Lee ,  Sang Jae Park

IPC: H01L25/065 ,  H01L25/00 ,  H01L21/768 ,  H01L23/00 ,  H01L23/532 ,  H01L23/31 ,  H01L23/528 ,  H01L23/522 ,  H01L27/088 ,  H10B12/00 ,  G11C5/10 ,  G11C11/402 ,  H01L49/02

CPC classification number: H10B12/34 ,  G11C5/10 ,  G11C11/4023 ,  H01L28/91

Abstract: A semiconductor device may comprise: a plurality of lower electrodes which are on a substrate; a first electrode support which is between adjacent lower electrodes and comprises a metallic material; a dielectric layer which is on the lower electrodes and the first electrode support to extend along profiles of the first electrode support and each of the lower electrodes; and an upper electrode which is on the dielectric layer.

公开(公告)号：US11600495B2

公开(公告)日：2023-03-07

申请号：US17029215

申请日：2020-09-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yoon Young Choi ,  Dong Kyun Lee ,  Sang Oh Lee ,  Sang Jae Park

IPC: H01L21/311 ,  H01L21/033 ,  H01L49/02

Abstract: Provided is a method of manufacturing a semiconductor device. The method includes providing a substrate in which a main area including a first cell area and a first peripheral area, and an edge area including a second cell area and a second peripheral area are defined, sequentially forming a mold layer, a supporter layer, a mask layer, and a preliminary pattern layer on the substrate, exposing the preliminary pattern layer to light to simultaneously form a first pattern and a second pattern on the mask layer of the first cell area and the second cell area, respectively, forming an etch stop layer on the second pattern and etching the mask layer using the etch stop layer and the first pattern to form a hole pattern in the mold layer and the supporter layer of the first cell area.