-
公开(公告)号:US20220013397A1
公开(公告)日:2022-01-13
申请号:US17165594
申请日:2021-02-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Daehyun LEE , YOUNGIL KANG , YOUNGEUN KIM , Jaesuk KIM , MINJI PARK , SANGWOOK PARK , Dongho Shin , DONGYUN YEO , CHUNGHUN LEE , KYOUNG-MI CHOI
IPC: H01L21/683 , H01J37/32
Abstract: Disclosed is a plasma processing apparatus comprising a plasma electrode, an electrostatic chuck, and a diode board. The electrostatic chuck includes a microheater layer and a chuck electrode. The microheater layer includes an inner heater part and an outer heater part. The inner heater part includes a first inner heater in a first inner region that circumferentially surrounds a center of the microheater layer, and a second inner heater in a second inner region that circumferentially surrounds the first inner region. The outer heater part includes a first outer heater in a first outer region that circumferentially surrounds the second inner region, and a second outer heater in a second outer region that circumferentially surrounds the first outer region. A distance between centers of the first and second outer heaters is less than that between centers of the first and second inner heaters.
-
公开(公告)号:US20230130345A1
公开(公告)日:2023-04-27
申请号:US17709971
申请日:2022-03-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: KYOUNGMIN KIM , DONGGEON KIM , MYEONGSIK RYU , SANGWOOK PARK , INSEOK BAEK , BOKYEON WON
IPC: H01L27/108 , H01L25/065 , G11C11/408 , H01L29/423
Abstract: A sub word-line driver circuit of a semiconductor memory device includes a first active pattern and a second active pattern in a substrate, and a gate pattern. The first active pattern includes a first drain region and a first source region of a first keeping transistor that precharges a first word-line which is inactive and extends in a first direction with a negative voltage. The second active pattern includes a second drain region and a second source region of a second keeping transistor that precharges a second word-line which is inactive and extends in the first direction with the negative voltage. The gate pattern is on a portion of the first active pattern and on a portion of the second active pattern, partially overlaps the first active pattern and the second active pattern.
-